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Performance evaluation of a massively parallel I/O subsystem

Authors:

Sandra Johnson Baylor,

Caroline Benveniste,

Yarsun HsuAuthors Info & Claims

ACM SIGARCH Computer Architecture News, Volume 22, Issue 4

Pages 5 - 10

https://doi.org/10.1145/190787.190788

Published: 01 September 1994 Publication History

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Abstract

Presented are the trace-driven simulation results of a study conducted to evaluate the performance of the internal parallel I/O subsystem of the Vulcan MPP architecture. The system sizes evaluated vary from 16 to 512 nodes. The results show that a compute node to I/O node ratio of four is the most cost effective for all system sizes, showing high scalability. Also, processor-to-processor communication effects are negligible for small message sizes and the greater the fraction of I/O reads, the better the I/O performance. Worse case I/O node placement is within 13% of more efficient placement strategies. Introducing parallelism into the internal I/O subsystem improves I/O performance significantly.

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Lee Y(2004)A virtual server queueing network method for component based performance modelling of metacomputingFuture Generation Computer Systems10.1016/S0167-739X(03)00141-920:1(145-155)Online publication date: 1-Jan-2004
https://dl.acm.org/doi/10.1016/S0167-739X%2803%2900141-9
Baylor SBenveniste CHsu YValero M(1995)Performance evaluation of a parallel I/O architectureProceedings of the 9th international conference on Supercomputing10.1145/224538.224645(404-413)Online publication date: 3-Jul-1995
https://dl.acm.org/doi/10.1145/224538.224645
Benveniste CHeidelberger P(1995)Parallel simulation of the IBM SP2 interconnection networkWinter Simulation Conference Proceedings, 1995.10.1109/WSC.1995.478803(584-589)Online publication date: 1995
https://doi.org/10.1109/WSC.1995.478803

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Performance evaluation of a massively parallel I/O subsystem

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Published In

cover image ACM SIGARCH Computer Architecture News

ACM SIGARCH Computer Architecture News Volume 22, Issue 4

Special issue on input/output in parallel computer systems

Sept. 1994

79 pages

ISSN:0163-5964

DOI:10.1145/190787

Editor:
Doug DeGroot
Texas Instruments Inc., Dallas, TX

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Association for Computing Machinery

New York, NY, United States

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Published: 01 September 1994

Published in SIGARCH Volume 22, Issue 4

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Lee Y(2004)A virtual server queueing network method for component based performance modelling of metacomputingFuture Generation Computer Systems10.1016/S0167-739X(03)00141-920:1(145-155)Online publication date: 1-Jan-2004
https://dl.acm.org/doi/10.1016/S0167-739X%2803%2900141-9
Baylor SBenveniste CHsu YValero M(1995)Performance evaluation of a parallel I/O architectureProceedings of the 9th international conference on Supercomputing10.1145/224538.224645(404-413)Online publication date: 3-Jul-1995
https://dl.acm.org/doi/10.1145/224538.224645
Benveniste CHeidelberger P(1995)Parallel simulation of the IBM SP2 interconnection networkWinter Simulation Conference Proceedings, 1995.10.1109/WSC.1995.478803(584-589)Online publication date: 1995
https://doi.org/10.1109/WSC.1995.478803

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Abstract

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Recommendations

Parallel I/O Subsystems in Massively Parallel Supercomputers

Performance Modeling and Evaluation of MPI

Performance Evaluation of Practical Parallel Computation Model LogPQ

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