An FPGA-based experimental evaluation of microprocessor core error detection with Argus-2

Recently, several researchers have proposed schemes for low-cost, low-power error detection in the processor core. In this work, we demonstrate that one particular scheme, an enhanced implementation of the Argus framework called Argus-2, is a viable ...

The algorithm-based fault tolerance techniques have been proposed to obtain reliableresults at very low hardware overhead. Even though 100% fault coverage can betheoretically obtained by using these techniques, the system performance, i.e., ...

Argus, a novel approach for detecting errors in simple processor cores, dynamically verifies the correctness of the four tasks performed by a von Neumann core: control flow, data flow, computation, and memory access. Argus detects transient and ...