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SMECY: smart multi-core embedded systems

Published: 02 May 2011 Publication History

Abstract

SMECY project is an ambitious European initiative involving 29 partners across 9 countries to enable Europe to have a leader role in multi-core domain by developing new programming technologies enabling the exploitation of architectures offering hundreds of cores. Multi-core technologies will rapidly provide to the parallel computing field improved performance, energy saving and cost reduction and will become of strategic value in winning market share in all areas of embedded systems. Given the need, SMECY lays the focus on targeting programming multi-core architecture for consumer electronics with efficient resources management. The first presentation describes the overall project while the two others are respectively dedicated to the multi-core platforms targeted in the project and the description of the tools constituting the bricks of the tool chains.

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  • (2016)Design of multicore HEVC decoders using actor-based dataflow models and OpenMPIEEE Transactions on Consumer Electronics10.1109/TCE.2016.761320062:3(325-333)Online publication date: 1-Aug-2016

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cover image ACM Conferences
GLSVLSI '11: Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
May 2011
496 pages
ISBN:9781450306676
DOI:10.1145/1973009

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  • IEEE CEDA
  • IEEE CASS

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 02 May 2011

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  1. compilation
  2. tool chain

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GLSVLSI '11
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GLSVLSI '11: Great Lakes Symposium on VLSI 2011
May 2 - 4, 2011
Lausanne, Switzerland

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

View all
  • (2016)Design of multicore HEVC decoders using actor-based dataflow models and OpenMPIEEE Transactions on Consumer Electronics10.1109/TCE.2016.761320062:3(325-333)Online publication date: 1-Aug-2016

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