Cited By
View all- Kim HCho MLee SKwon HChoi WKim Y(2022)Content-Addressable Memory System Using a Nanoelectromechanical Memory SwitchElectronics10.3390/electronics1103048111:3(481)Online publication date: 7-Feb-2022
A comparative study of state-of-the-art low-power CAM match-line sense amplifier designs
Authors: 
Anh Tuan Do, Xiaoliang Tan, Shoushun Chen, Zhi Hui Kong, Kiat Seng YeoAuthors Info & Claims
Pages 371 - 374
Abstract
Robust, high-performance and low-power match-line sense amplifier designs are urgently required to catch up with the new requirements of large-scale CAMs in nano-scale CMOS technologies. In this paper we evaluate the performance of four state-of-the-art match-line sense amplifier designs in terms of power, delay and robustness against temperature, supply voltage and process variations. Our results show that the pre-charge low match-line sensing schemes suffers from process variations. Despite featuring low power consumption, these designs can hardly be scaled down to operate in low-voltage sub-65 nm CMOS process. On the other hand, the conventional and the charge-injection designs are much more robust and hence more suitable for low-voltage sub-65 nm CMOS implementations.
References
[1]
K. Pagiamtzis and A. Sheikholeslami, "Content-addressable memory (CAM) circuits and architectures: a tutorial and survey," IEEE Journal of Solid-State Circuits, vol. 41, pp. 712--727, 2006.
[2]
G. Kasai, et al., "200MHz/200MSPS 3.2W at 1.5V Vdd, 9.4Mbits ternary CAM with new charge injection match detect circuits and bank selection scheme," IEEE Proceedings of Custom Integrated Circuits Conference, CICC 2003, pp. 387--390.
[3]
I. Arsovski, et al., "A ternary content-addressable memory (TCAM) based on 4T static storage and including a current-race sensing scheme," IEEE Journal of Solid-State Circuits, vol. 38, pp. 155--158, 2003.
[4]
I. Arsovski and A. Sheikholeslami, "A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories," IEEE Journal of Solid-State Circuits, vol. 38, pp. 1958--1966, 2003.
[5]
N. Mohan, et al., "A Low-Power Ternary CAM With Positive-Feedback Match-Line Sense Amplifiers," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 56, pp. 566--573, 2009.
[6]
O. Tyshchenko, et al., "Match sensing using match-line stability in content addressable memorys (CAM)," IEEE Journal of Solid-State Circuits, vol. 43, pp. 1972--1981,2008.
[7]
A. T. Do, et al., "Low IR Drop and Low Power Parallel CAM Design Using Gated Power Transistor Technique," IEEE Asia Pacific Conference Circuits and Systems 2010, APCCAS 2010
[8]
A. T. Do, et al., "A Low-Power CAM with Efficient Power and Delay Trade-off," IEEE International Symposium in Circuits and System, ISCAS 2011.
[9]
L. Perng-Fei et al., "A 1-V 128-kb four-way set-associative CMOS cache memory using wordline-oriented tag-compare (WLOTC) structure with the content-addressable-memory (CAM) 10-transistor tag cell," IEEE Journal of Solid State Circuits, vol. 36, pp. 666--675, 2011
Index Terms
- A comparative study of state-of-the-art low-power CAM match-line sense amplifier designs
Recommendations
A low-power low-noise and high swing biopotential amplifier in 0.18 µm CMOS
In this paper, a low-power, low-noise and high swing capacitively coupled instrumentation amplifier for biomedical applications is proposed. It uses the folded cascode operational transconductance amplifier (FC-OTA) with current scaling at the output ...
Experimental 5-GHz RF frontends for ultra-low-voltage and ultra-low-power operations
This paper presents experimental CMOS RF frontends suitable for ultra-low-power and ultra-low-voltage operations. In order to achieve the desirable gain and linearity of the receiver chain at a reduced supply voltage, the current-reused bias technique ...
A fully differential capacitively-coupled high CMRR low-power chopper amplifier for EEG dry electrodes
AbstractThe use of dry electrodes is increasing rapidly. Since their impedance is high, there is a high impedance node at the connecting node between the electrode and amplifier. This leads to absorb powerline signal and high CMRR amplifiers are essential ...
Comments
Please enable JavaScript to view thecomments powered by Disqus.Information & Contributors
Information
Published In
May 2011
496 pages
ISBN:9781450306676
DOI:10.1145/1973009
- General Chairs:
- David Atienza,
- Yuan Xie,
- Program Chairs:
- Jose L. Ayala,
- Ken Stevens
Copyright © 2011 ACM.
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]
Sponsors
In-Cooperation
- IEEE CEDA
- IEEE CASS
Publisher
Association for Computing Machinery
New York, NY, United States
Publication History
Published: 02 May 2011
Check for updates
Author Tags
Qualifiers
- Poster
Conference
GLSVLSI '11
Sponsor:
Acceptance Rates
Overall Acceptance Rate 312 of 1,156 submissions, 27%
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- View Citations1Total Citations
- 106Total Downloads
- Downloads (Last 12 months)3
- Downloads (Last 6 weeks)0
Reflects downloads up to 13 Nov 2024
Other Metrics
Citations
Cited By
View all- Kim HCho MLee SKwon HChoi WKim Y(2022)Content-Addressable Memory System Using a Nanoelectromechanical Memory SwitchElectronics10.3390/electronics1103048111:3(481)Online publication date: 7-Feb-2022
View Options
Get Access
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in