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Hardware and software support for efficient exception handling

Published: 01 November 1994 Publication History

Abstract

Program-synchronous exceptions, for example, breakpoints, watchpoints, illegal opcodes, and memory access violations, provide information about exceptional conditions, interrupting the program and vectoring to an operating system handler. Over the last decade, however, programs and run-time systems have increasingly employed these mechanisms as a performance optimization to detect normal and expected conditions. Unfortunately, current architecture and operating system structures are designed for exceptional or erroneous conditions, where performance is of secondary importance, rather than normal conditions. Consequently, this has limited the practicality of such hardware-based detection mechanisms.
We propose both hardware and software structures that permit efficient handling of synchronous exceptions by user-level code. We demonstrate a software implementation that reduces exception-delivery cost by an order-of-magnitude on current RISC processors, and show the performance benefits of that mechanism for several example applications.

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cover image ACM Conferences
ASPLOS VI: Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
November 1994
341 pages
ISBN:0897916603
DOI:10.1145/195473
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 November 1994

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Cited By

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  • (2018)An Evaluation of Asynchronous Software Events on Modern Hardware2018 IEEE 26th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS)10.1109/MASCOTS.2018.00041(355-368)Online publication date: Sep-2018
  • (2017)HyperkernelProceedings of the 26th Symposium on Operating Systems Principles10.1145/3132747.3132748(252-269)Online publication date: 14-Oct-2017
  • (2013)Architecting against Software Cache-Based Side-Channel AttacksIEEE Transactions on Computers10.1109/TC.2012.7862:7(1276-1288)Online publication date: 1-Jul-2013
  • (2013)The von Neumann computer model on the mirror of new technologiesProceedings of the 14th International Carpathian Control Conference (ICCC)10.1109/CarpathianCC.2013.6560579(411-416)Online publication date: May-2013
  • (2009)Hardware-software integrated approaches to defend against software cache-based side channel attacks2009 IEEE 15th International Symposium on High Performance Computer Architecture10.1109/HPCA.2009.4798277(393-404)Online publication date: Feb-2009
  • (2008)PangaeaProceedings of the 17th international conference on Parallel architectures and compilation techniques10.1145/1454115.1454125(52-61)Online publication date: 25-Oct-2008
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