research-article

Is transactional programming actually easier?

Authors:

Christopher J. Rossbach,

Owen S. Hofmann,

Emmett WitchelAuthors Info & Claims

ACM SIGPLAN Notices, Volume 45, Issue 5

Pages 47 - 56

https://doi.org/10.1145/1837853.1693462

Published: 09 January 2010 Publication History

Abstract

Chip multi-processors (CMPs) have become ubiquitous, while tools that ease concurrent programming have not. The promise of increased performance for all applications through ever more parallel hardware requires good tools for concurrent programming, especially for average programmers. Transactional memory (TM) has enjoyed recent interest as a tool that can help programmers program concurrently.

The transactional memory (TM) research community is heavily invested in the claim that programming with transactional memory is easier than alternatives (like locks), but evidence for or against the veracity of this claim is scant. In this paper, we describe a user-study in which 237 undergraduate students in an operating systems course implement the same programs using coarse and fine-grain locks, monitors, and transactions. We surveyed the students after the assignment, and examined their code to determine the types and frequency of programming errors for each synchronization technique. Inexperienced programmers found baroque syntax a barrier to entry for transactional programming. On average, subjective evaluation showed that students found transactions harder to use than coarse-grain locks, but slightly easier to use than fine-grained locks. Detailed examination of synchronization errors in the students' code tells a rather different story. Overwhelmingly, the number and types of programming errors the students made was much lower for transactions than for locks. On a similar programming problem, over 70% of students made errors with fine-grained locking, while less than 10% made errors with transactions.

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Cited By

Nunes DCastro DRomano P(2023)CSMV: A highly scalable multi-versioned software transactional memory for GPUsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2023.04.002180(104701)Online publication date: Oct-2023
https://doi.org/10.1016/j.jpdc.2023.04.002
Andrade GGriebler DSantos RFernandes L(2023)A parallel programming assessment for stream processing applications on multi-core systemsComputer Standards & Interfaces10.1016/j.csi.2022.10369184:COnline publication date: 1-Mar-2023
https://dl.acm.org/doi/10.1016/j.csi.2022.103691
Daleiden PStefik AUesbeck P(2020)GPU Programming Productivity in Different Abstraction ParadigmsACM Transactions on Computing Education10.1145/341830120:4(1-27)Online publication date: 14-Oct-2020
https://dl.acm.org/doi/10.1145/3418301
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Index Terms

Is transactional programming actually easier?
1. Computing methodologies
  1. Parallel computing methodologies
    1. Parallel programming languages
2. Software and its engineering
  1. Software notations and tools
    1. General programming languages
      1. Language types
        Parallel programming languages

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Information & Contributors

Information

Published In

cover image ACM SIGPLAN Notices

ACM SIGPLAN Notices Volume 45, Issue 5

PPoPP '10

May 2010

346 pages

ISSN:0362-1340

EISSN:1558-1160

DOI:10.1145/1837853

Issue’s Table of Contents

PPoPP '10: Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
January 2010
372 pages
ISBN:9781605588773
DOI:10.1145/1693453
General Chairs:
R. Govindarajan
Indian Institute of Science
,
David Padua
UIUC
,
Program Chair:
Mary Hall
University of Utah

Copyright © 2010 ACM.

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Publication History

Published: 09 January 2010

Published in SIGPLAN Volume 45, Issue 5

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Cited By

Nunes DCastro DRomano P(2023)CSMV: A highly scalable multi-versioned software transactional memory for GPUsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2023.04.002180(104701)Online publication date: Oct-2023
https://doi.org/10.1016/j.jpdc.2023.04.002
Andrade GGriebler DSantos RFernandes L(2023)A parallel programming assessment for stream processing applications on multi-core systemsComputer Standards & Interfaces10.1016/j.csi.2022.10369184:COnline publication date: 1-Mar-2023
https://dl.acm.org/doi/10.1016/j.csi.2022.103691
Daleiden PStefik AUesbeck P(2020)GPU Programming Productivity in Different Abstraction ParadigmsACM Transactions on Computing Education10.1145/341830120:4(1-27)Online publication date: 14-Oct-2020
https://dl.acm.org/doi/10.1145/3418301
Yu ZZuo YZhao Y(2019)Convoider: A Concurrency Bug Avoider Based on Transparent Software Transactional MemoryInternational Journal of Parallel Programming10.1007/s10766-019-00642-1Online publication date: 12-Sep-2019
https://doi.org/10.1007/s10766-019-00642-1
Diegues NRomano PGarbatov S(2017)SeerACM Transactions on Computer Systems10.1145/313203635:3(1-41)Online publication date: 14-Nov-2017
https://dl.acm.org/doi/10.1145/3132036
Wang PLu KLi GZhou X(2017)A survey of the double‐fetch vulnerabilitiesConcurrency and Computation: Practice and Experience10.1002/cpe.434530:6Online publication date: 12-Oct-2017
https://doi.org/10.1002/cpe.4345
Didona DDiegues NKermarrec AGuerraoui RNeves RRomano P(2016)ProteusTMACM SIGARCH Computer Architecture News10.1145/2980024.287238544:2(757-771)Online publication date: 25-Mar-2016
https://dl.acm.org/doi/10.1145/2980024.2872385
Didona DDiegues NKermarrec AGuerraoui RNeves RRomano P(2016)ProteusTMACM SIGOPS Operating Systems Review10.1145/2954680.287238550:2(757-771)Online publication date: 25-Mar-2016
https://doi.org/10.1145/2954680.2872385
Didona DDiegues NKermarrec AGuerraoui RNeves RRomano P(2016)ProteusTMACM SIGPLAN Notices10.1145/2954679.287238551:4(757-771)Online publication date: 25-Mar-2016
https://dl.acm.org/doi/10.1145/2954679.2872385
Uesbeck PStefik AHanenberg SPedersen JDaleiden PDillon LVisser WWilliams L(2016)An empirical study on the impact of C++ lambdas and programmer experienceProceedings of the 38th International Conference on Software Engineering10.1145/2884781.2884849(760-771)Online publication date: 14-May-2016
https://dl.acm.org/doi/10.1145/2884781.2884849
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