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Instruction selection by graph transformation

Published: 24 October 2010 Publication History

Abstract

Common generated instruction selections are based on tree pattern matching, but modern and custom architectures feature instructions, which cannot be covered by trees. To overcome this limitation, we are the first to employ graph transformation, the natural generalization of tree rewriting. Currently, the only approach allowing us to pair graph-based instruction selection with linear time complexity is the mapping to the Partitioned Boolean Quadratic Problem (PBQP). We present formal foundations to verify this approach and therewith identify two problems of the common method and resolve them. We confirm the capabilities of PBQP-based instruction selection by a comparison with a finely-tuned hand-written instruction selection.

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Cited By

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  • (2021)Development of DSL Compilers for Specialized ProcessorsProgramming and Computer Software10.1134/S036176882107008247:7(541-554)Online publication date: 3-Dec-2021
  • (2017)Complete and Practical Universal Instruction SelectionACM Transactions on Embedded Computing Systems10.1145/312652816:5s(1-18)Online publication date: 27-Sep-2017
  • (2015)Modeling Universal Instruction SelectionPrinciples and Practice of Constraint Programming10.1007/978-3-319-23219-5_42(609-626)Online publication date: 13-Aug-2015
  • Show More Cited By

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cover image ACM Conferences
CASES '10: Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
October 2010
276 pages
ISBN:9781605589039
DOI:10.1145/1878921
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 24 October 2010

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  1. instruction selection

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ESWeek '10
ESWeek '10: Sixth Embedded Systems Week
October 24 - 29, 2010
Arizona, Scottsdale, USA

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Overall Acceptance Rate 52 of 230 submissions, 23%

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Cited By

View all
  • (2021)Development of DSL Compilers for Specialized ProcessorsProgramming and Computer Software10.1134/S036176882107008247:7(541-554)Online publication date: 3-Dec-2021
  • (2017)Complete and Practical Universal Instruction SelectionACM Transactions on Embedded Computing Systems10.1145/312652816:5s(1-18)Online publication date: 27-Sep-2017
  • (2015)Modeling Universal Instruction SelectionPrinciples and Practice of Constraint Programming10.1007/978-3-319-23219-5_42(609-626)Online publication date: 13-Aug-2015
  • (2011)SSA-based register allocation with PBQPProceedings of the 20th international conference on Compiler construction: part of the joint European conferences on theory and practice of software10.5555/1987237.1987243(42-61)Online publication date: 26-Mar-2011
  • (2011)Solving the TTC 2011 Compiler Optimization Case with GrGen.NETElectronic Proceedings in Theoretical Computer Science10.4204/EPTCS.74.774(42-53)Online publication date: 16-Nov-2011
  • (2011)SSA-Based Register Allocation with PBQPCompiler Construction10.1007/978-3-642-19861-8_4(42-61)Online publication date: 2011

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