Nothing Special   »   [go: up one dir, main page]

skip to main content
10.1145/1840845.1840856acmconferencesArticle/Chapter ViewAbstractPublication PagesislpedConference Proceedingsconference-collections
research-article

Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems

Published: 18 August 2010 Publication History

Abstract

In this paper, a novel thermal-aware dynamic placement planner for reconfigurable systems is presented, which targets transient temperature reduction. Rather than solving time-consuming differential equations to obtain the hotspots, we propose a fast and accurate heuristic model based on power budgeting to plan the dynamic placements of the design statically, while considering the boundary conditions. Based on our heuristic model, we have developed a fast optimization technique to plan the dynamic placements at design time. Our results indicate that our technique is two orders of magnitude faster while the quality of the placements generated in terms of temperature and interconnection overhead is the same, if not better, compared to the thermal-aware placement techniques which perform thermal simulations inside the search engine.

References

[1]
S. H Gunther, et al., "Managing the impact of increasing microprocessor power consumption," Intel Technology journal, vol. 5, pp. 1--9, Feb. 2001.
[2]
R Rao, et al., "Efficient online computation of core speeds to maximize the throughput of thermally constrained multi-core processors," in ICCAD, 2008.
[3]
F. Mulas, et al., "Thermal Balancing Policy for Streaming Computing on multiprocessor architectures," in DATE, 2008.
[4]
A. K. Coskum, et al., "Temperature management in multiprocessor SoCs using online learning," in DAC, 2008.
[5]
NEC electronics, "Dynamically Reconfigurable Processor (DRP) -- What is DRP?," 2004.
[6]
N. Suzuki, et al, "Implementing and Evaluating Stream Applications on DRP," in FCCM'04.
[7]
K. Skadron, et al., "Temperature-aware microarchitecture," in ISCA, 2003.
[8]
P. Lim, et al., "Thermal-aware high-level synthesis based on network flow method," in CODES+ISSS, 2006.
[9]
T. Chantem, et al., "Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs," in DATE, 2008.
[10]
Z. gu, et al., "TAPHS: Thermal-Aware Unified Physical-Level and High-Level Synthesis," in ASPDAC, 2006.
[11]
M. Healy, et al., "Thermal Optimization in Multi-Granularity Multi-Core Floorplanning," in ASPDAC, 2009.
[12]
J. Jaffari, et al., "Thermal-Aware Placement for FPGAs using Electrostatic Charge Model," in ISQED, 2007.
[13]
H. D. Mogal, et al., "Thermal-Aware Floorplanning for Task Migration Enabled Active," in ICCAD, 2008.
[14]
S. Heo, et al., "Reducing power density through activity migration," in ISLPED, 2003.
[15]
S. C. Chapra, Numerical Methods for Engineers, 4th Ed. McGraw Hill, 2002.
[16]
C. D. Meyer, Matrix Analysis and Applied Linear Algebra. Society for Industrial and Applied Mathematics, 2000.
[17]
Vaughn Betz, et al., Architecture and CAD for Deep-Submicron FPGAs. KLUWER Academic Publishers, 1999.
[18]
Express group at UCSB:, "http://express.ece.ucsb.edu/benchmark/".
[19]
G. Link, et al., "Thermal trends in emerging technologies," in ISQED, 2006

Cited By

View all
  • (2017)Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.270712025:9(2525-2537)Online publication date: Sep-2017
  • (2016)TeSHoP: A Temperature Sensing based Hotspot-Driven Placement technique for FPGAs2016 26th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2016.7577304(1-4)Online publication date: Aug-2016
  • (2013)Thermal-aware datapath merging for coarse-grained reconfigurable processorsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485679(1649-1654)Online publication date: 18-Mar-2013

Index Terms

  1. Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems

      Recommendations

      Comments

      Please enable JavaScript to view thecomments powered by Disqus.

      Information & Contributors

      Information

      Published In

      cover image ACM Conferences
      ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
      August 2010
      458 pages
      ISBN:9781450301466
      DOI:10.1145/1840845
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

      Sponsors

      In-Cooperation

      • IEEE CAS

      Publisher

      Association for Computing Machinery

      New York, NY, United States

      Publication History

      Published: 18 August 2010

      Permissions

      Request permissions for this article.

      Check for updates

      Author Tags

      1. computer aided design
      2. dynamic reconfiguration
      3. placement
      4. reconfigurable systems
      5. temperature

      Qualifiers

      • Research-article

      Conference

      ISLPED'10
      Sponsor:

      Acceptance Rates

      Overall Acceptance Rate 398 of 1,159 submissions, 34%

      Contributors

      Other Metrics

      Bibliometrics & Citations

      Bibliometrics

      Article Metrics

      • Downloads (Last 12 months)1
      • Downloads (Last 6 weeks)0
      Reflects downloads up to 30 Sep 2024

      Other Metrics

      Citations

      Cited By

      View all
      • (2017)Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.270712025:9(2525-2537)Online publication date: Sep-2017
      • (2016)TeSHoP: A Temperature Sensing based Hotspot-Driven Placement technique for FPGAs2016 26th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2016.7577304(1-4)Online publication date: Aug-2016
      • (2013)Thermal-aware datapath merging for coarse-grained reconfigurable processorsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485679(1649-1654)Online publication date: 18-Mar-2013

      View Options

      Get Access

      Login options

      View options

      PDF

      View or Download as a PDF file.

      PDF

      eReader

      View online with eReader.

      eReader

      Media

      Figures

      Other

      Tables

      Share

      Share

      Share this Publication link

      Share on social media