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Resilient circuits: enabling energy-efficient performance and reliability

Published: 02 November 2009 Publication History

Abstract

Voltage and frequency margins necessary to ensure correct processor operation under dynamic voltage, temperature, and aging variations result in performance and power overheads. Resilient circuit techniques, including embedded error-detection sequentials and tunable replica circuits, allow these margins to be reduced or eliminated, resulting in reliable, energy-efficient operation.

References

[1]
J. Tschanz, et al., "Adaptive Frequency and Biasing Techniques for Tolerance to Dynamic Temperature-Voltage Variations and Aging," in IEEE ISSCC Dig. Tech. Papers, Feb. 2007, pp. 292--293.
[2]
M. Agarwal et al., "Circuit Failure Prediction and its Application to Transistor Aging," in IEEE VLSI Test Symposium, 2007, pp. 277--286.
[3]
M. Zhang et al., "Design for Resilience to Soft Errors and Variations," in IEEE On-Line Testing Symposium, 2007, pp. 23--28.
[4]
P. Franco and E. J. McCluskey, "Delay Testing of Digital Circuits by Output Waveform Analysis," in Proc. IEEE Intl. Test Conf., Oct. 1991, pp. 798--807.
[5]
S. Das, et al., "Razor II: In Situ Error Detection and Correction for PVT and SER Tolerance," IEEE J. Solid-State Circuits, pp. 32--48, Jan. 2009.
[6]
K. A. Bowman, et al., "Energy-Efficient and Metastability-Immune Resilient Circuits for Dynamic Variation Tolerance," IEEE J. Solid-State Circuits, pp. 49--63, Jan. 2009.
[7]
J. Tschanz, et al., "Tunable Replica Circuits and Adaptive Voltage-Frequency Techniques for Dynamic Voltage, Temperature, and Aging Variation Tolerance," in IEEE Symp. VLSI Circuits, June 2009.

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  • (2018)A Rank Decomposed Statistical Error Compensation Technique for Robust Convolutional Neural Networks in the Near Threshold Voltage RegimeJournal of Signal Processing Systems10.1007/s11265-018-1332-490:10(1439-1451)Online publication date: 1-Oct-2018
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      cover image ACM Conferences
      ICCAD '09: Proceedings of the 2009 International Conference on Computer-Aided Design
      November 2009
      803 pages
      ISBN:9781605588001
      DOI:10.1145/1687399
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 02 November 2009

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      Author Tags

      1. adaptation
      2. delay faults
      3. dynamic variations
      4. error detection
      5. error recovery
      6. parameter variations
      7. resilient circuits
      8. timing errors
      9. variation-tolerant circuits

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      Overall Acceptance Rate 457 of 1,762 submissions, 26%

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      Cited By

      View all
      • (2018)Energy-efficient Convolutional Neural Networks via Statistical Error Compensated Near Threshold Computing2018 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2018.8351679(1-5)Online publication date: May-2018
      • (2018)A 65 fps Full-HD Hardware Implementation of HOG, HOF, MBHx, and MBHy for Real-Time Action Recognition2018 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2018.8350912(1-5)Online publication date: 2018
      • (2018)A Rank Decomposed Statistical Error Compensation Technique for Robust Convolutional Neural Networks in the Near Threshold Voltage RegimeJournal of Signal Processing Systems10.1007/s11265-018-1332-490:10(1439-1451)Online publication date: 1-Oct-2018
      • (2017)C-MineACM Transactions on Design Automation of Electronic Systems10.1145/314453423:2(1-23)Online publication date: 29-Nov-2017
      • (2016)Probabilistic error models for machine learning kernels implemented on stochastic nanoscale fabricsProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2971919(481-486)Online publication date: 14-Mar-2016
      • (2016)Variation-Tolerant Architectures for Convolutional Neural Networks in the Near Threshold Voltage Regime2016 IEEE International Workshop on Signal Processing Systems (SiPS)10.1109/SiPS.2016.11(17-22)Online publication date: Oct-2016
      • (2015)Reduced Overhead Error Compensation for Energy Efficient Machine Learning KernelsProceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840822(15-21)Online publication date: 2-Nov-2015
      • (2015)Reduced overhead error compensation for energy efficient machine learning kernels2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2015.7372544(15-21)Online publication date: Nov-2015
      • (2014)Software canariesProceedings of the 2014 international symposium on Low power electronics and design10.1145/2627369.2627646(159-164)Online publication date: 11-Aug-2014
      • (2014)C-MineProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2593107(1-6)Online publication date: 1-Jun-2014
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