Nothing Special   »   [go: up one dir, main page]

skip to main content
10.1145/1233501.1233564acmconferencesArticle/Chapter ViewAbstractPublication PagesiccadConference Proceedingsconference-collections
Article

Analytical modeling of SRAM dynamic stability

Published: 05 November 2006 Publication History

Abstract

In this paper, for the first time, a theory for evaluating dynamic noise margins of SRAM cells is developed analytically. The results allow predicting the transient error susceptibility of an SRAM cell using a closed-form expression. The key innovation involves using the methods of nonlinear system theory in developing the model. It is shown that when a transient noise of given magnitude affects a sensitive node of a cell, the bi-stable, feedback-driven nature of the cell determines whether the noise will be suppressed or will evolve to eventually flip state. The specific formal and quantitative result is a closed-form expression that can be used to predict whether a cell flip will occur for a noise signal with specific characteristics, and for a given SRAM cell design. Experiments show excellent match between the analytical prediction and the SPICE simulation results.

References

[1]
E. Seevinck, F. J. List and J. Lohstroh, "Static-noise margin analysis of MOS SRAM cells," JSSC, 1987, pp. 748--754.
[2]
J. Lohstroh, E. Seevinck and J. D. Groot, "Worst-case static noise margin criteria for logic circuits and their mathematical equivalence," JSSC, 1983, pp. 803--807.
[3]
H. H. Chen and J. S. Neely, "Interconnect and circuit modeling techniques for full-chip power supply noise analysis," IEEE Trans. Components, Packaging, and Manufacturing Technology-Part B, 1998, pp. 209--215.
[4]
R. Gharpurey and R. G. Meyer, "Modeling and analysis of substrate coupling in IC's," IEEE Custom-Integrated Circuit Conf., 1995, pp. 125--128.
[5]
H.-R. Cha and O.-K. Kwon, "An analytical model of simultaneous switching noise in CMOS systems," IEEE Trans. Advanced Packaging, 2000, pp. 62--68.
[6]
P. E. Dodd and L. W. Massengill, "Basic mechanisms and modeling of single-event upset in digital microelectronics," IEEE Trans. Nucl. Sci., 2003, pp. 583--602.
[7]
D. C. Pham, et. al., "Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor," JSSC, 2006, pp. 179--196.
[8]
J. S. Fu, C. L. Axness and H. T. Weaver, "Two-dimensional simulation of single event induced bipolar current in CMOS structures," IEEE Trans. Nucl. Sci., 1984, pp. 1155--1159.
[9]
P. Hazucha and C. Svensson, "Impact of CMOS technology scaling on the atmospheric neutron soft error rate," IEEE Trans. Nucl. Sci., 2000, pp. 2586--2594.
[10]
K. Mayaram, J.-H. Chern and P. Yang, "Algorithms for transient three-dimensional mixed-level circuit and device simulation," IEEE Trans. Computer-Aided Design, 1993, pp. 1726--1733.
[11]
K. Mohanram, "Closed-form simulation and robustness models for SEU-tolerant design," VLSI Test Symp., 2005, pp. 327--333.
[12]
A. Dharchoudhury, et al., "Fast timing simulation of transient faults in digital circuits," ICCAD, 1994, pp. 719--726.
[13]
M. Omana, et al., "A model for transient fault propagation in combinatorial logic," Intl. On-line Testing Symp., 2003, pp. 111--115.
[14]
R. Heald and P. Wang, "Variability in sub-100nm SRAM designs," ICCAD, 2004, pp. 347--352.
[15]
M. Horowitz, "Timing models for MOS circuits," Ph. D. Dissertation, Stanford University, 1984.
[16]
Z. Vukic, et. al., Nonlinear Control Systems, Marcel Dekker Inc., 2003.
[17]
N. Hedenstierna and K. O. Jeppson, "CMOS circuit speed and buffer optimization," IEEE Trans. Computer-Aided Design, 1987, pp. 270--281.
[18]
T. Sakurai and A. R. Newton, "Alpha-power law MOSFET model and its applications to CMOS inverter," JSSC, 1990, pp. 584--594.
[19]
PTM, http://www.eas.asu.edu/~ptm/.

Cited By

View all
  • (2024)A novel single ended 3T SRAM cell using FinFET technology for low power applicationsi-manager’s Journal on Electronics Engineering10.26634/jele.14.4.2091114:4(25)Online publication date: 2024
  • (2024)A novel 1T-1D single ended SRAM cell using FinFET technology for low power applicationsi-manager’s Journal on Electronics Engineering10.26634/jele.14.3.2028614:3(6)Online publication date: 2024
  • (2019)RETRACTED ARTICLE: Hybrid on-chip soft computing model for performance evaluation of 6T SRAM cell using 45-nm technologySoft Computing10.1007/s00500-019-04581-424:14(10785-10799)Online publication date: 9-Dec-2019
  • Show More Cited By

Recommendations

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM Conferences
ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
November 2006
147 pages
ISBN:1595933891
DOI:10.1145/1233501
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 05 November 2006

Permissions

Request permissions for this article.

Check for updates

Qualifiers

  • Article

Conference

ICCAD06
Sponsor:

Acceptance Rates

Overall Acceptance Rate 457 of 1,762 submissions, 26%

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)33
  • Downloads (Last 6 weeks)3
Reflects downloads up to 13 Feb 2025

Other Metrics

Citations

Cited By

View all
  • (2024)A novel single ended 3T SRAM cell using FinFET technology for low power applicationsi-manager’s Journal on Electronics Engineering10.26634/jele.14.4.2091114:4(25)Online publication date: 2024
  • (2024)A novel 1T-1D single ended SRAM cell using FinFET technology for low power applicationsi-manager’s Journal on Electronics Engineering10.26634/jele.14.3.2028614:3(6)Online publication date: 2024
  • (2019)RETRACTED ARTICLE: Hybrid on-chip soft computing model for performance evaluation of 6T SRAM cell using 45-nm technologySoft Computing10.1007/s00500-019-04581-424:14(10785-10799)Online publication date: 9-Dec-2019
  • (2016)Towards a highly reliable SRAM-based PUFsProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2971870(273-276)Online publication date: 14-Mar-2016
  • (2014)Understanding SRAM Stability via Bifurcation AnalysisACM Transactions on Design Automation of Electronic Systems10.1145/264795719:4(1-25)Online publication date: 29-Aug-2014
  • (2013)Leveraging sensitivity analysis for fast, accurate estimation of SRAM dynamic write VMINProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485717(1819-1824)Online publication date: 18-Mar-2013
  • (2013)Functionality and stability analysis of a 400mV quasi-static RAM (QSRAM) bitcellMicroelectronics Journal10.1016/j.mejo.2012.12.00544:3(236-247)Online publication date: Mar-2013
  • (2012)Variation-Tolerant SRAM Write and Read Assist TechniquesNanometer Variation-Tolerant SRAM10.1007/978-1-4614-1749-1_3(49-95)Online publication date: 26-Sep-2012
  • (2011)On the impact of gate oxide degradation on SRAM dynamic and static write-abilityProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950951(707-712)Online publication date: 25-Jan-2011
  • (2011)Leakage-aware redundancy for reliable sub-threshold memoriesProceedings of the 48th Design Automation Conference10.1145/2024724.2024826(435-440)Online publication date: 5-Jun-2011
  • Show More Cited By

View Options

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Figures

Tables

Media

Share

Share

Share this Publication link

Share on social media