Nothing Special   »   [go: up one dir, main page]

skip to main content
10.1145/1133956.1133967acmconferencesArticle/Chapter ViewAbstractPublication PagesismmConference Proceedingsconference-collections
Article

McRT-Malloc: a scalable transactional memory allocator

Published: 10 June 2006 Publication History

Abstract

Emerging multi-core processors promise to provide an exponentially increasing number of hardware threads with every generation. Applications will need to be highly concurrent to fullyuse the power of these processors. To enable maximum concurrency, libraries (such as malloc-free packages) would therefore need to use non-blocking algorithms. But lock-free algorithms are notoriously difficult to reason about and inappropriate for average programmers. Transactional memory promises to significantly ease concurrent programming for the average programmer. This paper describes a highly efficient non-blocking malloc/free algorithm that supports memory allocation and deallocation inside transactional code blocks. Thus this paper describes a memory allocator that is suitable for emerging multi-core applications, while supporting modern concurrency constructs.This paper makes several novel contributions. It is the first to integrate a software transactional memory system with a malloc/free based memory allocator. We present the first algorithm which ensures that space allocated in an aborted transaction is properly freed and does not lead to a space blowup. Unlike previous lock-free malloc packages, our algorithm avoids atomic operations on typical code paths, making our algorithm substantially more efficient.

References

[1]
Allan, E., Chase, D., Luchango, V., Maessen, J., Ryu, S., Steele Jr., G., Tobin-Hochstadt, S. The Fortress language specification, version 0.618. Sun Microsystems Technical Report, April 2005.
[2]
Berger, E. D., McKinley, K. S., Blumofe, R. D., and Wilson, P. R. 2000. Hoard: a scalable memory allocator for multithreaded applications. In Proceedings of the Ninth international Conference on Architectural Support For Programming Languages and Operating Systems (Cambridge, Massachusetts, United States). ASPLOS-IX. ACM Press, NewYork, NY, 117--128. DOI= http://doi.acm.org/10.1145/378993.379232
[3]
Charles, P., Donawa, C., Ebcioglu, K., Grothoff, C., Kielstra, A., von Praun, C., Saraswat, V., Sarkar, V. X10: An object oriented approach to non-uniform cluster computing, OOPSLA, October 2005.
[4]
Cray Inc. The Chapel language specification, version 0.4. Technical Report, Cray Inc. Feb 2005.
[5]
Ennals, R. Cache sensitive software transactional memory. Technical Report.
[6]
Gray, J. and Reuter A. Transaction processing: concepts and techniques.
[7]
M. Greenwald. Non-blocking Synchronization and System Design. Ph.D. Thesis July 1999. Also available as Stanford University Technical Report STAN-CS-TR-99-1624
[8]
Harris, T.L. and Fraser, K. Language support for light weight transactions. In Proceedings of the 18th Annual ACM SIGPLAN Conference on Object-Oriented Programing, Systems, Languages, and Applications (Anaheim, California, USA, October 26 - 30, 2003). OOPSLA '03. ACM Press, New York, NY, 388--402. DOI= http://doi.acm.org/10.1145/949305.949340
[9]
Harris, T. L., Marlow, S., Peyton Jones, S., Herlihy, M. Composable memory transactions. Proceedings of the Principles and Practice of Parallel Programming, PPoPP, June 2005.
[10]
Herlihy, M., Luchangco, V., and Moir, M. 2002. The Repeat Offender Problem: A Mechanism for Supporting Dynamic-Sized, Lock-Free Data Structures. In Proceedings of the 16th international Conference on Distributed Computing (October28 - 30, 2002). D. Malkhi, Ed. Lecture Notes In Computer Science, vol. 2508. Springer-Verlag, London, 339--353.
[11]
Michael, M. M. 2004. Scalable lock-free dynamic memory allocation. In Proceedings of the ACM SIGPLAN 2004 Conference on Programming Language Design and Implementation (Washington DC, USA, June 09 - 11, 2004). PLDI '04. ACM Press, New York, NY, 35--46.
[12]
Johnstone, M. S. and Wilson, P. R. 1998. The memory fragmentation problem: solved?. In Proceedings of the 1st international Symposium on Memory Management(Vancouver, British Columbia, Canada, October 17 - 19, 1998). ISMM '98. ACM Press, New York, NY, 26--36. DOI= http://doi.acm.org/10.1145/286860.286864
[13]
Rajwar, R., Herlihy, M., and Lai, K. Virtualizing transactional memory. Proceedings of the International Symposium on Computer Architecture, June 2005.
[14]
Rattner, J. Multicore to the masses. Parallel Architectures and Compilation Techniques, Keynote. September 2005.
[15]
Marathe, V. J., Scherer, W. N., and Scott, M. L. 2004. Design tradeoffs in modern software transactional memory systems. In Proceedings of the 7th Workshop on Workshop on Languages, Compilers, and Run-Time Support For Scalable Systems (Houston, Texas, October 22 - 23, 2004). LCR '04, vol. 81. ACM Press, New York, NY, 1--7. DOI= http://doi.acm.org/10.1145/1066650.1066660
[16]
Michael, M. M. Safe memory reclamation for dynamic lock-free objects using atomic reads and writes. Proceedings of the 21 st Annual ACM Symposium on Principles of Distributed Computing, page 21--30, July 2002.
[17]
Saha, B., Adl-Tabatabai, A., Hudson, R., Minh, C., Hertzberg, B., A High Performance Software Transactional Memory System For A Multi-Core Runtime. In Proceedings of the Principles and Practice of Parallel Programming, PPoPP, New York, NY, March 2006.

Cited By

View all
  • (2023)CLMalloc: contiguous memory management mechanism for large-scale CPU-accelerator hybrid architecturesThird International Symposium on Computer Engineering and Intelligent Communications (ISCEIC 2022)10.1117/12.2660807(31)Online publication date: 2-Feb-2023
  • (2022)Towards Efficient Cache Allocation for High-Frequency Checkpointing2022 IEEE 29th International Conference on High Performance Computing, Data, and Analytics (HiPC)10.1109/HiPC56025.2022.00043(262-271)Online publication date: Dec-2022
  • (2021)Memory at your serviceProceedings of the 22nd International Middleware Conference10.1145/3464298.3493394(185-197)Online publication date: 6-Dec-2021
  • Show More Cited By

Recommendations

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM Conferences
ISMM '06: Proceedings of the 5th international symposium on Memory management
June 2006
202 pages
ISBN:1595932216
DOI:10.1145/1133956
  • General Chair:
  • Erez Petrank,
  • Program Chair:
  • Eliot Moss
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 10 June 2006

Permissions

Request permissions for this article.

Check for updates

Author Tags

  1. memory management
  2. runtimes
  3. synchronization
  4. transactional memory

Qualifiers

  • Article

Conference

ISMM06
Sponsor:

Acceptance Rates

Overall Acceptance Rate 72 of 156 submissions, 46%

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)22
  • Downloads (Last 6 weeks)1
Reflects downloads up to 21 Nov 2024

Other Metrics

Citations

Cited By

View all
  • (2023)CLMalloc: contiguous memory management mechanism for large-scale CPU-accelerator hybrid architecturesThird International Symposium on Computer Engineering and Intelligent Communications (ISCEIC 2022)10.1117/12.2660807(31)Online publication date: 2-Feb-2023
  • (2022)Towards Efficient Cache Allocation for High-Frequency Checkpointing2022 IEEE 29th International Conference on High Performance Computing, Data, and Analytics (HiPC)10.1109/HiPC56025.2022.00043(262-271)Online publication date: Dec-2022
  • (2021)Memory at your serviceProceedings of the 22nd International Middleware Conference10.1145/3464298.3493394(185-197)Online publication date: 6-Dec-2021
  • (2019)Mimalloc: Free List Sharding in ActionProgramming Languages and Systems10.1007/978-3-030-34175-6_13(244-265)Online publication date: 18-Nov-2019
  • (2018)Harmonizing speculative and non-speculative execution in architectures for ordered parallelismProceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2018.00026(217-230)Online publication date: 20-Oct-2018
  • (2017)Bit Contiguous Memory Allocation for Processing In MemoryProceedings of the Workshop on Memory Centric Programming for HPC10.1145/3145617.3145618(11-19)Online publication date: 12-Nov-2017
  • (2016)Makalu: fast recoverable allocation of non-volatile memoryACM SIGPLAN Notices10.1145/3022671.298401951:10(677-694)Online publication date: 19-Oct-2016
  • (2016)Makalu: fast recoverable allocation of non-volatile memoryProceedings of the 2016 ACM SIGPLAN International Conference on Object-Oriented Programming, Systems, Languages, and Applications10.1145/2983990.2984019(677-694)Online publication date: 19-Oct-2016
  • (2016)Thrifty-mallocProceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems10.1145/2968455.2968513(1-10)Online publication date: 1-Oct-2016
  • (2015)SuperMalloc: a super fast multithreaded malloc for 64-bit machinesACM SIGPLAN Notices10.1145/2887746.275417850:11(41-55)Online publication date: 14-Jun-2015
  • Show More Cited By

View Options

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media