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When physical is not real enough

Published: 19 September 2004 Publication History

Abstract

This position paper argues that policies for physical memory management and for memory power mode control should be relocated to the system software of a programmable memory management controller (MMC). Similarly to the mapping of virtual to physical addresses done by an MMU of a processor, this controller offers another level of mapping from physical addresses to real addresses in a multi-bank multi-technology (DRAM, MRAM, FLASH) memory system. Furthermore, the programmable memory controller is responsible for the allocation and migration of memory according to power and performance demands.Our approach dissociates the aspects of memory protection and sharing from the aspect of energy-aware management of real memory. In this way, legacy operating systems do not have to be extended to reduce memory power dissipation, and power-aware memory is no longer limited to CPUs with an MMU.

References

[1]
X. Fan, C. Ellis, and A. Lebeck, "Memory controller policies for DRAM power management," in Proceedings of the International Symposium on Low-Power Electronics and Design ISLPED'01, August 2001.
[2]
H. Huang, P. Pillai, and K. G. Shin, "Design and implementation of power-aware virtual memory," in Proceedings of the 2003 USENIX Annual Technical Conference, June 2003.
[3]
A. Lebeck, X. Fan, H. Zeng, and C. Ellis, "Power aware page allocation," in Proceedings of the Ninth International Conference on Architectural Support for Programming Languages and Operating Systems ASPLOS'00, November 2000.
[4]
B. Abali, M. Banikazemi, X. Shen, H. Franke, D. E. Poff, and T. B. Smith, "Hardware compressed main memory: Operating system support and performance evaluation," IEEE Transactions on Computers, vol. 50, November 2001.
[5]
Micron Technology, "Mobile SDRAM's power-saving features," Tech. Note TN-48-10, 2002.

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cover image ACM Conferences
EW 11: Proceedings of the 11th workshop on ACM SIGOPS European workshop
September 2004
214 pages
ISBN:9781450378079
DOI:10.1145/1133572
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 19 September 2004

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EW04
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EW04: ACM SIGOPS European Workshop 2004
September 19 - 22, 2004
Leuven, Belgium

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EW 11 Paper Acceptance Rate 37 of 37 submissions, 100%;
Overall Acceptance Rate 37 of 37 submissions, 100%

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  • (2017)BATMANProceedings of the International Symposium on Memory Systems10.1145/3132402.3132404(268-280)Online publication date: 2-Oct-2017
  • (2014)CAMEOProceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2014.63(1-12)Online publication date: 13-Dec-2014
  • (2011)Page placement in hybrid memory systemsProceedings of the international conference on Supercomputing10.1145/1995896.1995911(85-95)Online publication date: 31-May-2011
  • (2007)Dynamic power management of DRAM using accessed physical addressesMicroprocessors & Microsystems10.1016/j.micpro.2006.07.00231:1(15-24)Online publication date: 1-Feb-2007

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