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Controlling program execution through binary instrumentation

Published: 01 December 2005 Publication History

Abstract

Binary instrumentation has been widely used to observe dynamic program behavior, but current binary instrumentation systems do not allow the tool writer to alter the program execution path. This paper introduces some simple and general mechanisms for a binary instrumentation infrastructure to provide control over the application's execution path, allowing tools to replay or skip parts of the application, and to start or switch between threads. Specifically, the technique provides the following three functionalities for both single-threaded and multi-threaded applications: (1) checkpointing the execution state, (2) resuming execution at a checkpoint, and (3) starting execution at an arbitrary point in the program with a specified architectural state. We describe our implementation of these functionalities in Pin, a dynamic binary instrumentation infrastructure from Intel [5]. We demonstrate the usefulness of our mechanism by describing several binary instrumentation tools that have been built using this interface, including a transactional memory model and a thread scheduler.

References

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Assembly Language Programmer's Guide (Pixie). MIPS Computer Systems, Inc., 1986.
[2]
C. Scott Ananian, Krste Asanovic, Bradley C. Kuszmaul, Charles E. Leiserson, and Sean Lie. Unbounded transactional memory. In HPCA, 2005.
[3]
Bryan Buck and Jeffrey K. Hollingsworth. An API for runtime code patching. International Journal of High Performance Computing Applications, pages 317--329, 2000.
[4]
Lance Hammond et al. Transactional memory coherence and consistency. In ISCA, 2004.
[5]
Chi-Keung Luk et al. Pin: Building customized program analysis tools with dynamic instrumentation. In PLDI, 2005.
[6]
Ravi Rajwar, Maurice Herlihy, and Konrad Lai. Virtualizing transactional memory. In ISCA, 2005.
[7]
Amitabh Srivastava and Alan Eustace. ATOM: A system for building customized program analysis tools. In PLDI, 1994.
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Emmett Witchel and Mendel Rosenblum. Embra: Fast and flexible machine simulation. In SIGMETRICS, 1996.

Cited By

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  • (2023)Disintegrating ManycoresProceedings of the 16th International Workshop on Network on Chip Architectures10.1145/3610396.3618090(3-8)Online publication date: 28-Oct-2023
  • (2022)Evasion and Countermeasures Techniques to Detect Dynamic Binary Instrumentation FrameworksDigital Threats: Research and Practice10.1145/34804633:2(1-28)Online publication date: 8-Feb-2022
  • (2022)A scalable architecture for reprioritizing ordered parallelismProceedings of the 49th Annual International Symposium on Computer Architecture10.1145/3470496.3527387(437-453)Online publication date: 18-Jun-2022
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Information & Contributors

Information

Published In

cover image ACM SIGARCH Computer Architecture News
ACM SIGARCH Computer Architecture News  Volume 33, Issue 5
Special issue on the 2005 workshop on binary instrumentation and application
December 2005
93 pages
ISSN:0163-5964
DOI:10.1145/1127577
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Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 December 2005
Published in SIGARCH Volume 33, Issue 5

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Cited By

View all
  • (2023)Disintegrating ManycoresProceedings of the 16th International Workshop on Network on Chip Architectures10.1145/3610396.3618090(3-8)Online publication date: 28-Oct-2023
  • (2022)Evasion and Countermeasures Techniques to Detect Dynamic Binary Instrumentation FrameworksDigital Threats: Research and Practice10.1145/34804633:2(1-28)Online publication date: 8-Feb-2022
  • (2022)A scalable architecture for reprioritizing ordered parallelismProceedings of the 49th Annual International Symposium on Computer Architecture10.1145/3470496.3527387(437-453)Online publication date: 18-Jun-2022
  • (2021)Control-Flow Carrying CodeNovel Techniques in Recovering, Embedding, and Enforcing Policies for Control-Flow Integrity10.1007/978-3-030-73141-0_4(53-76)Online publication date: 1-May-2021
  • (2020)T4Proceedings of the ACM/IEEE 47th Annual International Symposium on Computer Architecture10.1109/ISCA45697.2020.00024(159-172)Online publication date: 30-May-2020
  • (2019)Control-Flow Carrying CodeProceedings of the 2019 ACM Asia Conference on Computer and Communications Security10.1145/3321705.3329815(3-14)Online publication date: 2-Jul-2019
  • (2019)Reducing the Attack Surface of Dynamic Binary Instrumentation FrameworksDevelopments and Advances in Defense and Security10.1007/978-981-13-9155-2_1(3-13)Online publication date: 14-Jun-2019
  • (2018)Harmonizing speculative and non-speculative execution in architectures for ordered parallelismProceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2018.00026(217-230)Online publication date: 20-Oct-2018
  • (2017)FractalACM SIGARCH Computer Architecture News10.1145/3140659.308021845:2(587-599)Online publication date: 24-Jun-2017
  • (2017)FractalProceedings of the 44th Annual International Symposium on Computer Architecture10.1145/3079856.3080218(587-599)Online publication date: 24-Jun-2017
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