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Combinatorial sketching for finite programs

Published: 20 October 2006 Publication History

Abstract

Sketching is a software synthesis approach where the programmer develops a partial implementation - a sketch - and a separate specification of the desired functionality. The synthesizer then completes the sketch to behave like the specification. The correctness of the synthesized implementation is guaranteed by the compiler, which allows, among other benefits, rapid development of highly tuned implementations without the fear of introducing bugs.We develop SKETCH, a language for finite programs with linguistic support for sketching. Finite programs include many highperformance kernels, including cryptocodes. In contrast to prior synthesizers, which had to be equipped with domain-specific rules, SKETCH completes sketches by means of a combinatorial search based on generalized boolean satisfiability. Consequently, our combinatorial synthesizer is complete for the class of finite programs: it is guaranteed to complete any sketch in theory, and in practice has scaled to realistic programming problems.Freed from domain rules, we can now write sketches as simpleto-understand partial programs, which are regular programs in which difficult code fragments are replaced with holes to be filled by the synthesizer. Holes may stand for index expressions, lookup tables, or bitmasks, but the programmer can easily define new kinds of holes using a single versatile synthesis operator.We have used SKETCH to synthesize an efficient implementation of the AES cipher standard. The synthesizer produces the most complex part of the implementation and runs in about an hour.

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Published In

cover image ACM Conferences
ASPLOS XII: Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
October 2006
440 pages
ISBN:1595934510
DOI:10.1145/1168857
  • cover image ACM SIGOPS Operating Systems Review
    ACM SIGOPS Operating Systems Review  Volume 40, Issue 5
    Proceedings of the 2006 ASPLOS Conference
    December 2006
    425 pages
    ISSN:0163-5980
    DOI:10.1145/1168917
    Issue’s Table of Contents
  • cover image ACM SIGPLAN Notices
    ACM SIGPLAN Notices  Volume 41, Issue 11
    Proceedings of the 2006 ASPLOS Conference
    November 2006
    425 pages
    ISSN:0362-1340
    EISSN:1558-1160
    DOI:10.1145/1168918
    Issue’s Table of Contents
  • cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 34, Issue 5
    Proceedings of the 2006 ASPLOS Conference
    December 2006
    425 pages
    ISSN:0163-5964
    DOI:10.1145/1168919
    Issue’s Table of Contents
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Published: 20 October 2006

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  1. SAT
  2. sketching

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ASPLOS XII Paper Acceptance Rate 38 of 158 submissions, 24%;
Overall Acceptance Rate 535 of 2,713 submissions, 20%

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Cited By

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  • (2024)Verification-Aided Learning of Neural Network Barrier Functions with Termination Guarantees2024 American Control Conference (ACC)10.23919/ACC60939.2024.10645043(3610-3617)Online publication date: 10-Jul-2024
  • (2024)Control-Flow Deobfuscation using Trace-Informed Compositional Program SynthesisProceedings of the ACM on Programming Languages10.1145/36897898:OOPSLA2(2211-2241)Online publication date: 8-Oct-2024
  • (2024)libLISA: Instruction Discovery and Analysis on x86-64Proceedings of the ACM on Programming Languages10.1145/36897238:OOPSLA2(333-361)Online publication date: 8-Oct-2024
  • (2024)Automated Verification of Higher-Order Probabilistic Programs via a Dependent Refinement Type SystemProceedings of the ACM on Programming Languages10.1145/36746628:ICFP(973-1002)Online publication date: 15-Aug-2024
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