research-article

Computation of Seeds for LFSR-Based n-Detection Test Generation

Author:

Irith PomeranzAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 22, Issue 2

Article No.: 29, Pages 1 - 13

https://doi.org/10.1145/2994144

Published: 04 January 2017 Publication History

Abstract

This article describes a new procedure that generates seeds for LFSR-based test generation when the goal is to produce an n-detection test set. The procedure does not use test cubes in order to avoid the situation where a seed does not exist for a given test cube with a given LFSR. Instead, the procedure starts from a set of seeds that produces a one-detection test set. It modifies seeds to obtain new seeds such that the tests they produce increase the numbers of detections of target faults. The modification procedure also increases the number of faults that each additional seed detects. Experimental results are presented to demonstrate the effectiveness of the procedure.

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Cited By

Wang SZhou XHigami YTakahashi HIwata HMaeda YMatsushima J(2023)Test Point Insertion for Multi-Cycle Power-On Self-TestACM Transactions on Design Automation of Electronic Systems10.1145/356355228:3(1-21)Online publication date: 10-May-2023
https://dl.acm.org/doi/10.1145/3563552
Sun YMillican S(2022)Applying Artificial Neural Networks to Logic Built-in Self-test: Improving Test Point InsertionJournal of Electronic Testing: Theory and Applications10.1007/s10836-022-06016-938:4(339-352)Online publication date: 1-Aug-2022
https://dl.acm.org/doi/10.1007/s10836-022-06016-9
Sun YMillican SAgrawal V(2020)Special Session: Survey of Test Point Insertion for Logic Built-in Self-test2020 IEEE 38th VLSI Test Symposium (VTS)10.1109/VTS48691.2020.9107584(1-6)Online publication date: Apr-2020
https://doi.org/10.1109/VTS48691.2020.9107584

Index Terms

Computation of Seeds for LFSR-Based n-Detection Test Generation
1. Hardware
  1. Hardware test
    1. Design for testability
      1. Test data compression

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Information & Contributors

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 22, Issue 2

Special Section of IDEA: Integrating Dataflow, Embedded Computing, and Architecture

April 2017

458 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/3029795

Editor:
Naehyuck Chang
Korea Advanced Institute of Science and Technology, Korea

Issue’s Table of Contents

Copyright © 2017 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 04 January 2017

Accepted: 01 August 2016

Revised: 01 August 2016

Received: 01 April 2016

Published in TODAES Volume 22, Issue 2

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Cited By

Wang SZhou XHigami YTakahashi HIwata HMaeda YMatsushima J(2023)Test Point Insertion for Multi-Cycle Power-On Self-TestACM Transactions on Design Automation of Electronic Systems10.1145/356355228:3(1-21)Online publication date: 10-May-2023
https://dl.acm.org/doi/10.1145/3563552
Sun YMillican S(2022)Applying Artificial Neural Networks to Logic Built-in Self-test: Improving Test Point InsertionJournal of Electronic Testing: Theory and Applications10.1007/s10836-022-06016-938:4(339-352)Online publication date: 1-Aug-2022
https://dl.acm.org/doi/10.1007/s10836-022-06016-9
Sun YMillican SAgrawal V(2020)Special Session: Survey of Test Point Insertion for Logic Built-in Self-test2020 IEEE 38th VLSI Test Symposium (VTS)10.1109/VTS48691.2020.9107584(1-6)Online publication date: Apr-2020
https://doi.org/10.1109/VTS48691.2020.9107584

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