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A formal framework for modeling and validating Simulink diagrams

Published: 01 October 2009 Publication History

Abstract

Simulink has been widely used in industry to model and simulate embedded systems. With the increasing usage of embedded systems in real-time safety-critical situations, Simulink becomes deficient to analyze (timing) requirements with high-level assurance. In this article, we apply Timed Interval Calculus (TIC), a real-time specification language, to complement Simulink with TIC formal verification capability. We elaborately construct TIC library functions to model Simulink library blocks which are used to compose Simulink diagrams. Next, Simulink diagrams are automatically transformed into TIC models which preserve functional and timing aspects. Important requirements such as timing bounded liveness can be precisely specified in TIC for whole diagrams or some components. Lastly, validation of TIC models can be rigorously conducted with a high degree of automation using a generic theorem prover. Our framework can enlarge the design space by representing environment properties to open systems, and handle complex diagrams as the analysis of continuous and discrete behavior is supported.

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Published In

cover image Formal Aspects of Computing
Formal Aspects of Computing  Volume 21, Issue 5
Oct 2009
115 pages
ISSN:0934-5043
EISSN:1433-299X
Issue’s Table of Contents

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Springer-Verlag

Berlin, Heidelberg

Publication History

Published: 01 October 2009
Accepted: 31 December 2008
Received: 09 January 2008
Published in FAC Volume 21, Issue 5

Author Tags

  1. Simulink
  2. Real-Time Specification
  3. Z Language
  4. Formal Verification

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