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"Formal Verification of Fault-Tolerant Hardware Designs."

Luis Entrena et al. (2023)

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DOI: 10.1109/ACCESS.2023.3325616

access: open

type: Journal Article

metadata version: 2023-11-12

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  - journals/access/EntrenaSGPGLS23
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  - https://dblp.org/rec/journals/access/EntrenaSGPGLS23
Luis Entrena, Antonio J. Sanchez-Clemente, Luis Ángel García-Astudillo, Marta Portela-García, Mario García-Valderas, Almudena Lindoso, Roberto Sarmiento:
Formal Verification of Fault-Tolerant Hardware Designs. IEEE Access 11: 116127-116140 (2023)

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