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Qing Dong 0001
Person information
- affiliation: University of Michigan, Department of Electrical Engineering and Computer Science, Ann Arbor, MI, USA
Other persons with the same name
- Qing Dong — disambiguation page
- Qing Dong 0002 — University of Kitakyushu, Department of Information and Media Engineering, Wakamatsu, Japan
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2020 – today
- 2021
- [j9]Ziyun Li
, Zhehong Wang
RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator. IEEE J. Solid State Circuits 56(4): 1105-1115 (2021) - 2020
- [j8]Jeongsup Lee
A Self-Tuning IoT Processor Using Leakage-Ratio Measurement for Energy-Optimal Operation. IEEE J. Solid State Circuits 55(1): 87-97 (2020) - [c20]Qing Dong, Mahmut E. Sinangil, Burak Erbagci, Dar Sun, Win-San Khwa, Hung-Jen Liao, Yih Wang
15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning Applications. ISSCC 2020: 242-244 - [c19]Zhehong Wang, Ziyun Li, Li Xu
An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j7]Qing Dong
A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-Termination. IEEE J. Solid State Circuits 54(1): 231-239 (2019) - [c18]Jeongsup Lee, Yiqun Zhang, Qing Dong, Wootaek Lim, Mehdi Saligane, Yejoong Kim, Seokhyeon Jeong, Jongyup Lim, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, David T. Blaauw, Dennis Sylvester:
A 6.4pJ/Cycle Self-Tuning Cortex-M0 IoT Processor Based on Leakage-Ratio Measurement for Energy-Optimal Operation Across Wide-Range PVT Variation. ISSCC 2019: 314-315 - 2018
- [j6]Ziyun Li
A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles. IEEE J. Solid State Circuits 53(1): 76-90 (2018) - [j5]Yiqun Zhang
Recryptor: A Reconfigurable Cryptographic Cortex-M0 Processor With In-Memory and Near-Memory Computing for IoT Security. IEEE J. Solid State Circuits 53(4): 995-1005 (2018) - [j4]Qing Dong
A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V VDDmin. IEEE J. Solid State Circuits 53(4): 1006-1015 (2018) - [c17]Qing Dong, Zhehong Wang, Jongyup Lim
A 1Mb 28nm STT-MRAM with 2.8ns read access time at 1.2V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination. ISSCC 2018: 480-482 - [c16]Mehdi Saligane, Jeongsup Lee, Qing Dong, Makoto Yasuda, Kazuyuki Kumeno, Fumitaka Ohno, Satoru Miyoshi, Masaru Kawaminami, David T. Blaauw, Dennis Sylvester:
An Adaptive Body-Biaslna SoC Using in Situ Slack Monitoring for Runtime Replica Calibration. VLSI Circuits 2018: 63-64 - [c15]Kaiyuan Yang
A 28NM Integrated True Random Number Generator Harvesting Entropy from MRAM. VLSI Circuits 2018: 171-172 - [c14]Xiao Wu, Inhee Lee, Qing Dong, Kaiyuan Yang
A 0.04MM316NW Wireless and Batteryless Sensor System with Integrated Cortex-M0+ Processor and Optical Communication for Cellular Temperature Measurement. VLSI Circuits 2018: 191-192 - 2017
- [j3]Kaiyuan Yang
Exploiting the analog properties of digital circuits for malicious hardware. Commun. ACM 60(9): 83-91 (2017) - [j2]Dongsuk Jeon
A 23-mW Face Recognition Processor with Mostly-Read 5T Memory in 40-nm CMOS. IEEE J. Solid State Circuits 52(6): 1628-1642 (2017) - [j1]Qing Dong
Low-Power and Compact Analog-to-Digital Converter Using Spintronic Racetrack Memory Devices. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 907-918 (2017) - [c13]Qing Dong, Inhee Lee, Kaiyuan Yang
A 1.02nW PMOS-only, trim-free current reference with 282ppm/°C from -40°C to 120°C and 1.6% within-wafer inaccuracy. ESSCIRC 2017: 19-22 - [c12]Qing Dong, Kaiyuan Yang
Rectified-linear and recurrent neural networks built with spin devices. ISCAS 2017: 1-4 - [c11]Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin P. Kempke, Shijia Yang, Zhengya Zhang
3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation. ISSCC 2017: 62-63 - [c10]Kaiyuan Yang
8.3 A 553F2 2-transistor amplifier-based Physically Unclonable Function (PUF) with 1.67% native instability. ISSCC 2017: 146-147 - [c9]Kaiyuan Yang
9.2 A 0.6nJ -0.22/+0.19°C inaccuracy temperature sensor using exponential subthreshold oscillation dependence. ISSCC 2017: 160-161 - [c8]Qing Dong, Yejoong Kim
11.2 A 1Mb embedded NOR flash memory with 39µW program power for mm-scale high-temperature sensor nodes. ISSCC 2017: 198-199 - [c7]Suyoung Bang, Jingcheng Wang, Ziyun Li, Cao Gao, Yejoong Kim
14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence. ISSCC 2017: 250-251 - 2016
- [c6]Kaiyuan Yang
A2: Analog Malicious Hardware. IEEE Symposium on Security and Privacy 2016: 18-37 - [c5]Qing Dong, Kaiyuan Yang
A 114-pW PMOS-only, trim-free voltage reference with 0.26% within-wafer inaccuracy for nW systems. VLSI Circuits 2016: 1-2 - 2015
- [c4]Qing Dong, Kaiyuan Yang
Racetrack converter: A low power and compact data converter using racetrack spintronic devices. ISCAS 2015: 585-588 - [c3]Kaiyuan Yang
14.2 A physically unclonable function with BER-8 for robust chip authentication using oscillator collapse in 40nm CMOS. ISSCC 2015: 1-3 - [c2]Dongsuk Jeon, Qing Dong, Yejoong Kim
A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory. VLSIC 2015: 48- - 2014
- [c1]Yejoong Kim
27.8 A static contention-free single-phase-clocked 24T flip-flop in 45nm for low-power applications. ISSCC 2014: 466-467
Coauthor Index
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