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Richard W. Linderman
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2010 – 2019
- 2018
- [j7]Qiuwen Chen
, Ryan S. Luley, Qing Wu, Morgan Bishop, Richard W. Linderman, Qinru Qiu:
AnRAD: A Neuromorphic Anomaly Detection Framework for Massive Concurrent Data Streams. IEEE Trans. Neural Networks Learn. Syst. 29(5): 1622-1636 (2018) - 2015
- [c25]Qiuwen Chen, Qing Wu, Morgan Bishop, Richard W. Linderman, Qinru Qiu:
Self-structured confabulation network for fast anomaly detection and reasoning. IJCNN 2015: 1-8 - 2014
- [j6]Miao Hu, Hai Li
Memristor Crossbar-Based Neuromorphic Computing System: A Case Study. IEEE Trans. Neural Networks Learn. Syst. 25(10): 1864-1878 (2014) - 2013
- [j5]Qinru Qiu, Qing Wu, Morgan Bishop, Robinson E. Pino, Richard W. Linderman:
A Parallel Neuromorphic Text Recognition System and Its Implementation on a Heterogeneous High-Performance Computing Cluster. IEEE Trans. Computers 62(5): 886-899 (2013) - 2011
- [c24]Qinru Qiu, Qing Wu, Daniel J. Burns, Michael J. Moore, Robinson E. Pino, Morgan Bishop, Richard W. Linderman:
Confabulation based sentence completion for machine reading. CCMB 2011: 66-73 - [c23]Kannappan Palaniappan, Ilker Ersoy, Guna Seetharaman, Shelby R. Davis, Praveen Kumar, Raghuveer M. Rao, Richard W. Linderman:
Parallel flux tensor analysis for efficient moving object detection. FUSION 2011: 1-8 - [c22]Qinru Qiu, Qing Wu, Richard W. Linderman:
Unified perception-prediction model for context aware text recognition on a heterogeneous many-core platform. IJCNN 2011: 1714-1721 - 2010
- [c21]Richard W. Linderman:
GPGPU role within a 500 TFLOPS heterogeneous cluster. GPGPU 2010: 62 - [c20]Robinson E. Pino, Gerard Genello, Morgan Bishop, Michael J. Moore, Richard W. Linderman:
Emerging neuromorphic computing architectures & enabling hardware for cognitive information processing applications. CIP 2010: 35-39 - [c19]Morgan Bishop, Michael J. Moore, Daniel J. Burns, Robinson E. Pino, Richard W. Linderman:
Affordable emerging computer hardware for neuromorphic computing applications. IJCNN 2010: 1-5 - [c18]Michael J. Moore, Richard W. Linderman, Morgan Bishop, Robinson E. Pino:
A columnar primary visual cortex (V1) model emulation using a PS3 Cell-BE array. IJCNN 2010: 1-8 - [c17]Tarek M. Taha, Pavan Yalamanchili, Mohammad Ashraf Bhuiyan, Rommel Jalasutram, Chong Chen, Richard W. Linderman:
Neuromorphic algorithms on clusters of PlayStation 3s. IJCNN 2010: 1-10
2000 – 2009
- 2008
- [c16]Scott E. Spetka, George O. Ramseyer, Richard W. Linderman:
Fault tolerant integrated information management support for physically constrained iterative deconvolution. AIPR 2008: 1-5 - [c15]Qing Wu, Prakash Mukre, Richard W. Linderman, Thomas Renz, Daniel J. Burns, Michael J. Moore, Qinru Qiu:
Performance optimization for pattern recognition using associative neural memory. ICME 2008: 1-4 - [c14]Qinru Qiu, Daniel J. Burns, Michael J. Moore, Richard W. Linderman, Thomas Renz, Qing Wu:
Accelerating cogent confabulation: An exploration in the architecture design space. IJCNN 2008: 1292-1300 - [c13]Scott E. Spetka, Susan Emeny, George O. Ramseyer, Richard W. Linderman:
Using metrics to optimize a high performance intelligent image processing code. PerMIS 2008: 132-134 - 2007
- [c12]Scott E. Spetka, Scot Tucker, George O. Ramseyer, Richard W. Linderman:
Imagery Pattern Recognition and Pub/Sub Information Management. AIPR 2007: 37-41 - [c11]Qing Wu, Qinru Qiu, Richard W. Linderman, Daniel J. Burns, Michael J. Moore, Dennis Fitzgerald:
Architectural Design and Complexity Analysis of Large-Scale Cortical Simulation on a Hybrid Computing Platform. CISDA 2007: 201-205 - [c10]Scott E. Spetka, Scot Tucker, George O. Ramseyer, Richard W. Linderman:
Information management for high performance autonomous intelligent systems. PerMIS 2007: 237-241 - 2006
- [c9]Scott E. Spetka, George O. Ramseyer, Richard W. Linderman:
Application Development Framework for the Rapid Integration of High Performance Image Processing Algorithms. AIPR 2006: 32 - [c8]Nael B. Abu-Ghazaleh
Limiting Optimism: Time or Event Count? DS-RT 2006: 253-256 - [c7]Ben Cordes, Miriam Leeser
Poster reception - Improving the performance of parallel backprojection on a reconfigurable supercomputer. SC 2006: 149 - 2005
- [c6]Scott E. Spetka, George O. Ramseyer, Richard W. Linderman:
Using globus grid objects to extend a corba-based object-oriented system. OOPSLA Companion 2005: 188-189 - 2003
- [c5]Scott E. Spetka, George O. Ramseyer, Richard W. Linderman:
Redeveloping a high-Performance computing framework. OOPSLA Companion 2003: 98-99 - 2002
- [c4]Scott E. Spetka, George O. Ramseyer, Richard W. Linderman:
A FrameWork for high-performance image exploitation. OOPSLA Companion 2002: 42-43 - 2000
- [j4]Alok N. Choudhary, Wei-keng Liao
Design, implementation and evaluation of parallel pipelined STAP on parallel computers. IEEE Trans. Aerosp. Electron. Syst. 36(2): 528-548 (2000)
1990 – 1999
- 1998
- [j3]Richard W. Linderman, Ralph L. R. Kohler, Mark H. Linderman:
A Dependable High Performance Wafer Scale Architecture for Embedded Signal Processing. IEEE Trans. Computers 47(1): 125-128 (1998) - [c3]Alok N. Choudhary, Wei-keng Liao
Design, Implementation and Evaluation of Parallel Pipelined STAP on Parallel Computers. IPPS/SPDP 1998: 220-225
1980 – 1989
- 1989
- [j2]Richard W. Linderman, Paul C. Rossbach, David M. Gallagher:
Design and application of an optimizing XROM silicon compiler. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(12): 1267-1275 (1989) - 1988
- [j1]Richard W. Linderman, Carl G. Shephard, Kent Taylor, Paul W. Coutee, Paul C. Rossbach, James M. Collins, Robert S. Hauser:
A 70-MHz 1.2- mu m CMOS 16-point DFT processor. IEEE J. Solid State Circuits 23(2): 343-350 (1988) - 1984
- [c2]Richard W. Linderman, Peter P. Reusens, Paul M. Chau, Walter H. Ku:
Digital signal processing capabilities of CUSP, a high performance bit-serial VLSI processor. ICASSP 1984: 660-663 - [c1]Richard W. Linderman, Walter H. Ku:
A three dimensional systolic array architecture for fast matrix multiplication. ICASSP 1984: 782-785
Coauthor Index
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