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Arindam Sanyal
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2020 – today
- 2024
- [c49]Debnath Maiti, Sumukh Prashant Bhanushali, Arindam Sanyal:
Late Breaking Results: Machine Learning Based Reference Ripple Error Suppression in Successive Approximation Register Analog-to-Digital Converters. DAC 2024: 344:1-344:2 - [c48]Sumukh Prashant Bhanushali, Arindam Sanyal:
Enhancing Performance of SAR ADC through Supervised Machine Learning. ISCAS 2024: 1-5 - [c47]Sumukh Prashant Bhanushali, Tushar Gupta, Debnath Maiti, Arindam Sanyal:
Machine Learning Based Static and Dynamic Error Calibration in Data Converters. VTS 2024: 1-4 - 2023
- [j27]Sudarsan Sadasivuni
, Monjoy Saha
In-Sensor Artificial Intelligence and Fusion With Electronic Medical Records for At-Home Monitoring. IEEE Trans. Biomed. Circuits Syst. 17(2): 312-322 (2023) - [c46]Sumukh Prashant Bhanushali, Sudarsan Sadasivuni, Jose Sanchez, Imon Banerjee
Fully Integrated Mixed-Signal Classifier for Cardiovascular Health Monitoring. BioCAS 2023: 1-5 - [c45]Vasundhara Damodaran, Ziyu Liu, Jae-Sun Seo, Arindam Sanyal:
A Delta-Sigma Based SRAM Compute-in-Memory Macro for Human Activity Recognition. BioCAS 2023: 1-5 - [c44]Vasundhara Damodaran, Ziyu Liu, Jae-Sun Seo, Arindam Sanyal:
A 138-TOPS/W Delta-Sigma Modulator-Based Variable- Resolution Activation in-Memory Computing Macro. CICC 2023: 1-2 - [c43]Sumukh Prashant Bhanushali, Arindam Sanyal:
A 13.2fJ/step 74.3-dB SNDR Pipelined Noise-shaping SAR+VCO ADC. ESSCIRC 2023: 285-288 - 2022
- [j26]Sanjeev Tannirkulam Chandrasekaran
OTA-Free 1-1 MASH ADC Using Fully Passive Noise-Shaping SAR & VCO ADC. IEEE J. Solid State Circuits 57(4): 1100-1111 (2022) - [j25]Xiyuan Tang
Low-Power SAR ADC Design: Overview and Survey of State-of-the-Art Techniques. IEEE Trans. Circuits Syst. I Regul. Pap. 69(6): 2249-2262 (2022) - [j24]Sanjeev Tannirkulam Chandrasekaran
Real-Time Hardware-Based Malware and Micro-Architectural Attack Detection Utilizing CMOS Reservoir Computing. IEEE Trans. Circuits Syst. II Express Briefs 69(2): 349-353 (2022) - [c42]Sudarsan Sadasivuni, Vasundhara Damodaran, Imon Banerjee
Real-time prediction of cardiovascular diseases using reservoir-computing and fusion with electronic medical record. AICAS 2022: 58-61 - [c41]Sudarsan Sadasivuni, Sumukh Prashant Bhanushali, Imon Banerjee
A 43.6 TOPS/W AI Classifier with Sensor Fusion for Sepsis Onset Prediction. BioCAS 2022: 569-572 - [c40]Sudarsan Sadasivuni, Monjoy Saha, Sumukh Prashant Bhanushali, Imon Banerjee
Real-time sepsis prediction using fusion of on-chip analog classifier and electronic medical record. ISCAS 2022: 1635-1639 - 2021
- [j23]Sanjeev Tannirkulam Chandrasekaran
Toward Real-Time, At-Home Patient Health Monitoring Using Reservoir Computing CMOS IC. IEEE J. Emerg. Sel. Topics Circuits Syst. 11(4): 829-839 (2021) - [j22]Sanjeev Tannirkulam Chandrasekaran
Fully Integrated Analog Machine Learning Classifier Using Custom Activation Function for Low Resolution Image Classification. IEEE Trans. Circuits Syst. I Regul. Pap. 68(3): 1023-1033 (2021) - [c39]Shibo Zhou, Xiaohua Li, Ying Chen, Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal:
Temporal-Coded Deep Spiking Neural Network with Easy Training and Robust Performance. AAAI 2021: 11143-11151 - [c38]Sudarsan Sadasivuni, Sumukh Prashant Bhanushali, Sai Srinivasa Singamsetti, Imon Banerjee
Multi-Task Learning Mixed-Signal Classifier for In-situ Detection of Atrial Fibrillation and Sepsis. BioCAS 2021: 1-4 - [c37]Sanjeev Tannirkulam Chandrasekaran, Imon Banerjee
7.5nJ/inference CMOS Echo State Network for Coronary Heart Disease prediction. ESSCIRC 2021: 103-106 - [c36]Sanjeev Tannirkulam Chandrasekaran, Imon Banerjee
7.5nJ/inference CMOS Echo State Network for Coronary Heart Disease prediction. ESSDERC 2021: 103-106 - [c35]Arindam Sanyal
Impact of Voltage Sag on Market Operation in Electrical Power System. IAS 2021: 1-6 - [c34]Sanjeev Tannirkulam Chandrasekaran, Akshay Jayaraj, Naveen Ramesh, Arindam Sanyal:
33-200Mbps, 3pJ/Bit True Random Number Generator Based on CT Delta-Sigma Modulator. ISCAS 2021: 1-4 - [c33]Sudarsan Sadasivuni, Rahul Chowdhury, Vinay Elkoori Ghantala Karnam, Imon Banerjee
Recurrent Neural Network Circuit for Automated Detection of Atrial Fibrillation from Raw ECG. ISCAS 2021: 1-5 - [c32]Sanjeev Tannirkulam Chandrasekaran, Sumukh Prashant Bhanushali, Stefano Pietri, Arindam Sanyal:
OTA-free 1-1 MASH ADC using Fully Passive Noise Shaping SAR & VCO ADC. VLSI Circuits 2021: 1-2 - 2020
- [j21]Shibo Zhou, Ying Chen
Deep SCNN-Based Real-Time Object Detection for Self-Driving Vehicles Using LiDAR Temporal Data. IEEE Access 8: 76903-76912 (2020) - [j20]Yanlong Zhang
A Fractional-N PLL With Space-Time Averaging for Quantization Noise Reduction. IEEE J. Solid State Circuits 55(3): 602-614 (2020) - [j19]Akshay Jayaraj
76-dB DR, 48 fJ/Step Second-Order VCO-Based Current-to-Digital Converter. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(4): 1149-1157 (2020) - [j18]Abilash Venkatesh
0.3 pJ/Bit Machine Learning Resistant Strong PUF Using Subthreshold Voltage Divider Array. IEEE Trans. Circuits Syst. II Express Briefs 67-II(8): 1394-1398 (2020) - [j17]Akshay Jayaraj
0.6-1.2 V, 0.22 pJ/bit True Random Number Generator Based on SAR ADC. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 1765-1769 (2020) - [j16]Sanjeev Tannirkulam Chandrasekaran
8fJ/Step Bandpass ADC With Digitally Assisted NTF Re-Configuration. IEEE Trans. Circuits Syst. 67-I(10): 3262-3272 (2020) - [j15]Mohammadhadi Danesh
0.13pW/Hz Ring VCO-Based Continuous-Time Read-Out ADC for Bio-Impedance Measurement. IEEE Trans. Circuits Syst. 67-II(12): 2823-2827 (2020) - [j14]Mohammadhadi Danesh
Unified Analog PUF and TRNG Based on Current-Steering DAC and VCO. IEEE Trans. Very Large Scale Integr. Syst. 28(11): 2280-2289 (2020) - [c31]Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal:
Stochastic ΔΣ VCO-ADC Utilizing 4× Staggered Averaging. ISCAS 2020: 1-5 - [c30]Sudarsan Sadasivuni, Sanjeev Tannirkulam Chandrasekaran, Akshay Jayaraj, Arindam Sanyal:
Neural Networks for Authenticating Integrated Circuits Based on Intrinsic Nonlinearity. MWSCAS 2020: 253-256 - [c29]Sumukh Prashant Bhanushali, Sudarsan Sadasivuni, Imon Banerjee
Digital Machine Learning Circuit for Real-Time Stress Detection from Wearable ECG Sensor. MWSCAS 2020: 978-981
2010 – 2019
- 2019
- [j13]Shaolan Li, Arindam Sanyal, Kyoungtae Lee
Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs. IEICE Trans. Electron. 102-C(7): 509-519 (2019) - [j12]Akshay Jayaraj
Highly Digital Second-Order $\Delta\Sigma$ VCO ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(7): 2415-2425 (2019) - [j11]Akshay Jayaraj
Maximum Likelihood Estimation-Based SAR ADC. IEEE Trans. Circuits Syst. II Express Briefs 66-II(8): 1311-1315 (2019) - [c28]Akshay Jayaraj, Abhijit Das, Srinivas Arcot, Arindam Sanyal:
8.6fJ/step VCO-Based CT 2nd-Order $\Delta\Sigma$ ADC. A-SSCC 2019: 197-200 - [c27]Yanlong Zhang
A 2.4-GHz ΔΣ Fractional-N Synthesizer with Space-Time Averaging for Noise Reduction. CICC 2019: 1-4 - [c26]Mohammadhadi Danesh, Akshay Jayaraj, Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal:
Ultra-Low Power Analog Multiplier Based on Translinear Principle. ISCAS 2019: 1-5 - [c25]Mohammadhadi Danesh, Akshay Jayaraj, Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal:
0.43nJ, 0.48pJ/step Second-Order ΔΣ Current-to-Digital Converter for IoT Applications. ISCAS 2019: 1-5 - [c24]Akshay Jayaraj, Imon Banerjee
Common-Source Amplifier Based Analog Artificial Neural Network Classifier. ISCAS 2019: 1-5 - [c23]Abilash Venkatesh, Arindam Sanyal:
A Machine Learning Resistant Strong PUF using Subthreshold Voltage Divider Array in 65nm CMOS. ISCAS 2019: 1-5 - [c22]Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal:
A Highly Digital CCO-Based Asynchronous Analog-to-Time Converter. MWSCAS 2019: 105-108 - [c21]Ruobing Hua, Arindam Sanyal:
39fJ Analog Artificial Neural Network for Breast Cancer Classification in 65nm CMOS. MWSCAS 2019: 436-439 - [c20]Mohammadhadi Danesh, Arindam Sanyal:
Fully Digital 1-1 MASH VCO-Based ADC Architecture. MWSCAS 2019: 501-504 - [c19]Mohammadhadi Danesh, Aishwarya Bahudhanam Venkatasubramaniyan, Gaurav Kapoor, Arindam Sanyal:
A 0.36pJ/bit Analog PUF Based on Current Steering DAC and VCO. MWSCAS 2019: 578-581 - [c18]Sanjeev Tannirkulam Chandrasekaran, Gaurav Kapoor, Arindam Sanyal:
A Single Channel Bandpass SAR ADC with Digitally Assisted NTF Re-configuration. MWSCAS 2019: 754-757 - 2018
- [c17]Yi Zhong
A Second-Order Purely VCO-Based CT Δ∑ ADC Using a Modified DPLL in 40-nm CMOS. A-SSCC 2018: 93-94 - [c16]Mohammadhadi Danesh, Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal:
Ring Oscillator Based Delta-Sigma ADCs. ICECS 2018: 113-116 - [c15]Arindam Sanyal, Shaolan Li, Nan Sun:
Low-power Scaling-friendly Ring Oscillator based ΔΣ ADC. ISCAS 2018: 1-5 - [c14]Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal:
A Digital PLL Based 2nd-Order Δ∑ Bandpass Time-Interleaved ADC. MWSCAS 2018: 286-289 - [c13]Aishwarya Bahudhanam Venkatasubramaniyan, Arindam Sanyal:
Physically Unclonable Function based on Voltage Divider Arrays in Subthreshold Region. MWSCAS 2018: 845-848 - 2017
- [j10]Long Chen
A 0.7-V 0.6-µW 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction. IEEE J. Solid State Circuits 52(5): 1388-1398 (2017) - [j9]Arindam Sanyal
An Energy-Efficient Hybrid SAR-VCO ΔΣ Capacitance-to-Digital Converter in 40-nm CMOS. IEEE J. Solid State Circuits 52(7): 1966-1976 (2017) - [j8]Long Chen, Kareem Ragab, Xiyuan Tang, Jeonggoo Song, Arindam Sanyal, Nan Sun:
A 0.95-mW 6-b 700-MS/s Single-Channel Loop-Unrolled SAR ADC in 40-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 244-248 (2017) - [c12]Vaishak Prathap
2nd-Order VCO-based CT ΔΣ ADC architecture. MWSCAS 2017: 687-690 - 2016
- [c11]Arindam Sanyal, Nan Sun:
A 55fJ/conv-step hybrid SAR-VCO ΔΣ capacitance-to-digital converter in 40nm CMOS. ESSCIRC 2016: 385-388 - [c10]Long Chen, Arindam Sanyal, Ji Ma, Xiyuan Tang, Nan Sun:
Comparator common-mode variation effects analysis and its application in SAR ADCs. ISCAS 2016: 2014-2017 - [c9]Arindam Sanyal, Nan Sun:
A 18.5-fJ/step VCO-based 0-1 MASH ΔΣ ADC with digital background calibration. VLSI Circuits 2016: 1-2 - [i1]Imon Banerjee, Arindam Sanyal:
An Energy-Efficient VCO-Based Matrix Multiplier Block to Support On-Chip Image Analysis. CoRR abs/1612.03361 (2016) - 2015
- [j7]Arindam Sanyal, Nan Sun:
Dynamic Element Matching Techniques for Static and Dynamic Errors in Continuous-Time Multi-Bit ΔΣ Modulators. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(4): 598-611 (2015) - [j6]Manzur Rahman, Arindam Sanyal, Nan Sun:
A Novel Hybrid Radix-3/Radix-2 SAR ADC With Fast Convergence and Low Hardware Complexity. IEEE Trans. Circuits Syst. II Express Briefs 62-II(5): 426-430 (2015) - [j5]Kareem Ragab, Long Chen, Arindam Sanyal, Nan Sun:
Digital Background Calibration for Pipelined ADCs Based on Comparator Decision Time Quantization. IEEE Trans. Circuits Syst. II Express Briefs 62-II(5): 456-460 (2015) - [j4]Arindam Sanyal, Long Chen, Nan Sun:
Dynamic Element Matching With Signal-Independent Element Transition Rates for Multibit ΔΣ Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(5): 1325-1334 (2015) - [c8]Long Chen, Xiyuan Tang, Arindam Sanyal, Yeonam Yoon, Jie Cong, Nan Sun:
A 10.5-b ENOB 645 nW 100kS/s SAR ADC with statistical estimation based noise reduction. CICC 2015: 1-4 - 2014
- [j3]Arindam Sanyal, Nan Sun:
An Energy-Efficient Low Frequency-Dependence Switching Technique for SAR ADCs. IEEE Trans. Circuits Syst. II Express Briefs 61-II(5): 294-298 (2014) - [j2]Arindam Sanyal, Peijun Wang, Nan Sun:
A Thermometer-Like Mismatch Shaping Technique With Minimum Element Transition Activity for Multibit ΔΣ DACs. IEEE Trans. Circuits Syst. II Express Briefs 61-II(7): 461-465 (2014) - [c7]Arindam Sanyal, Kareem Ragab, Long Chen, T. R. Viswanathan, Shouli Yan, Nan Sun:
A hybrid SAR-VCO ΔΣ ADC with first-order noise shaping. CICC 2014: 1-4 - [c6]Long Chen, Arindam Sanyal, Ji Ma, Nan Sun:
A 24-µW 11-bit 1-MS/s SAR ADC with a bidirectional single-side switching technique. ESSCIRC 2014: 219-222 - [c5]Arindam Sanyal, Nan Sun:
A low frequency-dependence, energy-efficient switching technique for bottom-plate sampled SAR ADC. ISCAS 2014: 297-300 - [c4]Arindam Sanyal, Nan Sun:
An enhanced ISI shaping technique for multi-bit ΔΣ DACs. ISCAS 2014: 2341-2344 - 2013
- [c3]Wenjuan Guo, Youngchun Kim, Arindam Sanyal, Ahmed H. Tewfik, Nan Sun:
A single SAR ADC converting multi-channel sparse signals. ISCAS 2013: 2235-2238 - [c2]Arindam Sanyal, Nan Sun:
A very high energy-efficiency switching technique for SAR ADCs. MWSCAS 2013: 229-232 - 2012
- [c1]Arindam Sanyal, Nan Sun:
A simple and efficient dithering method for vector quantizer based mismatch-shaped ΔΣ DACs. ISCAS 2012: 528-531
2000 – 2009
- 2009
- [j1]Palaniandavar Venkateswaran, Arindam Sanyal, Snehasish Das, Rabindranath Nandi, Salil Kumar Sanyal:
An Efficient Time Domain Speech Compression Algorithm Based on LPC and Sub-Band Coding Techniques. J. Commun. 4(6): 423-428 (2009)
Coauthor Index
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last updated on 2024-11-14 00:52 CET by the dblp team
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