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Reinaldo A. Bergamaschi
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- affiliation: University of Campinas, Sao Paulo, Brazil
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2010 – 2019
- 2014
- [j27]Leonardo Piga, Reinaldo A. Bergamaschi, Sandro Rigo:
Empirical and analytical approaches for web server power modeling. Clust. Comput. 17(4): 1279-1293 (2014) - [j26]Reinaldo A. Bergamaschi, Henrique Przibisczki de Oliveira, Akihito Kumon Jr., Rodrigo Carvalho Rezende:
The Odysci Academic Search System. D Lib Mag. 20(5/6) (2014) - [j25]Leonardo Piga, Reinaldo A. Bergamaschi, Maurício Breternitz
, Sandro Rigo:
Adaptive global power optimization for Web servers. J. Supercomput. 68(3): 1088-1112 (2014) - 2013
- [j24]Reinaldo A. Bergamaschi, Sanjoy K. Baruah, Sebastian Fischmeister, Robert P. Dick, Jan Madsen, Rajesh Gupta, Vincent John Mooney III:
Introductions to special issue on ESWEEK 2011. Des. Autom. Embed. Syst. 17(2): 215-219 (2013) - 2012
- [j23]Reinaldo A. Bergamaschi, Rodrigo Carvalho Rezende, Henrique Przibisczki de Oliveira, Akihito Kumon Jr.:
A quantitative analysis of WWW, hypertext and JCDL conferences in the last decade. SIGWEB Newsl. 2012(Winter): 5:1-5:8 (2012) - [j22]Reinaldo A. Bergamaschi, Leonardo Piga, Sandro Rigo, Rodolfo Azevedo
Data center power and performance optimization through global selection of P-states and utilization rates. Sustain. Comput. Informatics Syst. 2(4): 198-208 (2012) - 2011
- [j21]Reinaldo A. Bergamaschi:
Announcement: introducing Odysci. ACM SIGACCESS Access. Comput. 101: 20-21 (2011) - [c35]Leonardo Piga, Reinaldo A. Bergamaschi, Felipe Klein, Rodolfo Azevedo
Empirical Web server power modeling and characterization. IISWC 2011: 75 - 2010
- [j20]Reinaldo A. Bergamaschi:
ESWEEK 2009 special issue introduction. Des. Autom. Embed. Syst. 14(3): 161 (2010)
2000 – 2009
- 2009
- [j19]Reinaldo A. Bergamaschi, Wolfgang Rosenstiel:
ESWEEK 2007 special issue introduction. Des. Autom. Embed. Syst. 13(1-2): 1 (2009) - 2008
- [j18]Reinaldo A. Bergamaschi, Luca Benini
The State of ESL Design [Roundtable]. IEEE Des. Test Comput. 25(6): 510-519 (2008) - [c34]Reinaldo A. Bergamaschi, Guoling Han, Alper Buyuktosunoglu, Hiren D. Patel, Indira Nair, Gero Dittmann
Exploring power management in multi-core systems. ASP-DAC 2008: 708-713 - [c33]Ricardo P. Jacobi, Reinaldo A. Bergamaschi:
Challenges of the nanoscale era. SBCCI 2008: 9 - 2007
- [j17]Reinaldo A. Bergamaschi:
Embedded Systems Week. IEEE Des. Test Comput. 24(1): 102-103 (2007) - [j16]Hiren D. Patel, Sandeep K. Shukla
Heterogeneous Behavioral Hierarchy Extensions for SystemC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(4): 765-780 (2007) - [c32]Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann
Performance modeling for early analysis of multi-core systems. CODES+ISSS 2007: 209-214 - 2006
- [c31]Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Bergamaschi:
Heterogeneous behavioral hierarchy for system level designs. DATE 2006: 565-570 - [e2]Reinaldo A. Bergamaschi, Kiyoung Choi:
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006. ACM 2006, ISBN 1-59593-370-0 [contents] - 2005
- [j15]Reinaldo A. Bergamaschi, Wolfgang Rosenstiel:
Editors' introduction. Des. Autom. Embed. Syst. 10(2-3): 71-72 (2005) - [j14]Nagu R. Dhanwada, Reinaldo A. Bergamaschi, William W. Dungan, Indira Nair, Paul Gramann, William E. Dougherty, Ing-Chao Lin:
Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems. Des. Autom. Embed. Syst. 10(2-3): 105-125 (2005) - [j13]Reinaldo A. Bergamaschi, Wolfgang Rosenstiel:
Second special issue on SystemC. Des. Autom. Embed. Syst. 10(4): 207 (2005) - [j12]Martin Ohmacht
Blue Gene/L compute chip: Memory and Ethernet subsystem. IBM J. Res. Dev. 49(2-3): 255-264 (2005) - [c30]Wolfgang Rosenstiel, Reinaldo A. Bergamaschi, Frank Ghenassia, Thorsten Groetker, Masamichi Kawarabayashi, Marinus C. van Lier, Albrecht Mayer, Mike Meredith, Mark Milligan, Stuart Swan:
Is there a Market for SystemC Tools? DATE 2005: 950 - [e1]Petru Eles, Axel Jantsch, Reinaldo A. Bergamaschi:
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005. ACM 2005, ISBN 1-59593-161-9 [contents] - 2004
- [c29]Francine Bacchini, Pierre G. Paulin, Reinaldo A. Bergamaschi, Raj Pawate, Arie Bernstein, Ramesh Chandra, Mohamed Ben-Romdhane:
System level design: six success stories in search of an industry. DAC 2004: 349-350 - [c28]Reinaldo A. Bergamaschi:
Early and accurate analysis of SoCs: oxymoron or real? SLIP 2004: 3-6 - 2003
- [c27]Reinaldo A. Bergamaschi, Grant Martin:
System-level design tools: who needs them, who has them, and how much should they cost? CODES+ISSS 2003: 79-80 - [c26]Reinaldo A. Bergamaschi, Youngsoo Shin, Nagu R. Dhanwada, Subhrajit Bhattacharya, William E. Dougherty, Indira Nair, John A. Darringer, Sarala Paliwal:
SEAS: a system for early analysis of SoCs. CODES+ISSS 2003: 150-155 - [c25]Reinaldo A. Bergamaschi, Grant Martin, Wayne H. Wolf, Rolf Ernst, Kees A. Vissers, Jack Kouloheris:
The future of system-level design: can we find the right solutions to the right problems at the right time? CODES+ISSS 2003: 231 - [c24]Reinaldo A. Bergamaschi, Yunjian Jiang:
State-based power analysis for systems-on-chip. DAC 2003: 638-641 - [c23]Shaojie Wang, Sharad Malik
Modeling and Integration of Peripheral Devices in Embedded Systems. DATE 2003: 10136-10141 - [c22]C. Ross Ogilvie, Richard Ray, Robert Devins, Mark Kautzman, Michael Hale, Reinaldo A. Bergamaschi, Bob Lynch, Santosh Gaur:
Simplifying SoC design with the Customizable Control Processor Platform. ICCD 2003: 402-403 - [p1]Shaojie Wang, Sharad Malik, Reinaldo A. Bergamaschi:
Modeling and Integration of Peripheral Devices in Embedded Systems. Embedded Software for SoC 2003: 69-82 - 2002
- [j11]John A. Darringer, Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Daniel Brand, Andreas Herkersdorf, Joseph K. Morrell, Indira Nair, Patricia Sagmeister, Youngsoo Shin:
Early analysis tools for system-on-a-chip design. IBM J. Res. Dev. 46(6): 691-708 (2002) - [j10]Reinaldo A. Bergamaschi:
Bridging the domains of high-level and logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(5): 582-596 (2002) - [c21]Reinaldo A. Bergamaschi, John M. Cohn:
The A to Z of SoCs. ICCAD 2002: 790-798 - 2001
- [j9]Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Ronoldo Wagner, Colleen Fellenz, Michael Muhlada, William R. Lee, Foster White, Jean-Marc Daveau:
Automating the Design of SOCs Using Cores. IEEE Des. Test Comput. 18(5): 32-45 (2001) - 2000
- [c20]Reinaldo A. Bergamaschi, William R. Lee, Duane Richardson, Subhrajit Bhattacharya, Michael Muhlada, Ronaldo Wagner, Arthur Weiner, Foster White:
Coral-automating the design of systems-on-chip using cores. CICC 2000: 109-112 - [c19]Reinaldo A. Bergamaschi, William R. Lee:
Designing systems-on-chip using cores. DAC 2000: 420-425
1990 – 1999
- 1999
- [c18]Reinaldo A. Bergamaschi:
Behavioral Network Graph: Unifying the Domains of High-Level and Logic Synthesis. DAC 1999: 213-218 - [c17]Reinaldo A. Bergamaschi, Brian M. Barry, John Duimovich:
Embedded Java: techniques and applications (tutorial abstract). ICCAD 1999: 613 - [c16]Pradip K. Jha, Steven Barnfield, John B. Weaver, Rudra Mukherjee, Reinaldo A. Bergamaschi:
Synthesis of Arrays and Records. ICCD 1999: 614-619 - [c15]Daniel Gajski, Reinaldo A. Bergamaschi:
Panel Statement: System-Level Design: Designers' Wish List vs. Reality. ISSS 1999: 8-9 - 1998
- [j8]Daniel Brand, Reinaldo A. Bergamaschi, Leon Stok:
Don't cares in synthesis: theoretical pitfalls and practical solutions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(4): 285-304 (1998) - 1997
- [j7]Reinaldo A. Bergamaschi, Salil Raje:
Observable Time Windows: Verifying High-Level Synthesis Results. IEEE Des. Test Comput. 14(2): 40-50 (1997) - [j6]Reinaldo A. Bergamaschi, Salil Raje, Indira Nair, Louise Trevillyan:
Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system. IEEE Trans. Very Large Scale Integr. Syst. 5(1): 82-100 (1997) - [c14]Salil Raje, Reinaldo A. Bergamaschi:
Generalized resource sharing. ICCAD 1997: 326-332 - 1996
- [c13]Reinaldo A. Bergamaschi, Salil Raje:
Observable Time Windows: Verifying the Results of High-Level Synthesis. ED&TC 1996: 350-356 - 1995
- [j5]Reinaldo A. Bergamaschi, Richard A. O'Connor, Leon Stok, Michael Z. Moricz, Shiv Prakash, Andreas Kuehlmann, D. Sreenivasa Rao:
High-level synthesis in an industrial environment. IBM J. Res. Dev. 39(1-2): 131-148 (1995) - [c12]Reinaldo A. Bergamaschi:
Productivity Issues in High-Level Design: Are Tools Solving the Real Problems? DAC 1995: 674-677 - [c11]Daniel Brand, Reinaldo A. Bergamaschi, Leon Stok:
Be careful with don't cares. ICCAD 1995: 83-86 - [c10]Reinaldo A. Bergamaschi, Daniel Brand, Leon Stok, Michel R. C. M. Berkelaar, Shiv Prakash:
Efficient use of large don't cares in high-level and logic synthesis. ICCAD 1995: 272-278 - 1993
- [j4]Reinaldo A. Bergamaschi, Andreas Kuehlmann:
A system for production use of high-level synthesis. IEEE Trans. Very Large Scale Integr. Syst. 1(3): 233-243 (1993) - 1992
- [j3]Reinaldo A. Bergamaschi, Raul Camposano, Michael Payer:
Allocation algorithms based on path analysis. Integr. 13(3): 283-299 (1992) - [c9]Reinaldo A. Bergamaschi, Donald A. Lobo, Andreas Kuehlmann:
Control Optimization in High-Level Synthesis Using Behavioral Don't Cares. DAC 1992: 657-661 - [c8]Andreas Kuehlmann, Reinaldo A. Bergamaschi:
Timing analysis in high-level synthesis. ICCAD 1992: 349-354 - [c7]Andreas Kuehlmann, Reinaldo A. Bergamaschi:
High-Level State Machine Specification and Synthesis. ICCD 1992: 536-539 - 1991
- [j2]Reinaldo A. Bergamaschi, Raul Camposano, Michael Payer:
Scheduling under resource constraints and module assignment. Integr. 12(1): 1-19 (1991) - [j1]Reinaldo A. Bergamaschi:
SKOL: a system for logic synthesis and technology mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(11): 1342-1355 (1991) - [c6]Reinaldo A. Bergamaschi, Raul Camposano, Michael Payer:
Data-Path Synthesis Using Path Analysis. DAC 1991: 591-596 - [c5]Reinaldo A. Bergamaschi, Raul Camposano, Michael Payer:
Area and performance optimizations in path-based scheduling. EURO-DAC 1991: 304-310 - [c4]Reinaldo A. Bergamaschi:
The Effects of False Paths in High-Level Synthesis. ICCAD 1991: 80-83 - 1990
- [c3]Raul Compasano, Reinaldo A. Bergamaschi:
Synthesis Using Path-Based scheduling: algorithms and Exercises. DAC 1990: 450-455 - [c2]Raul Camposano, Reinaldo A. Bergamaschi:
Redesign using state splitting. EURO-DAC 1990: 157-161
1980 – 1989
- 1988
- [c1]Reinaldo A. Bergamaschi:
Automatic synthesis and technology mapping of combinational logic. ICCAD 1988: 466-469
Coauthor Index
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