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Daniel B. Limbrick
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2020 – today
- 2024
- [j5]Mansi Bhavsar
, Yohannes Belayneh Bekele
FL-IDS: Federated Learning-Based Intrusion Detection System Using Edge Devices for Transportation IoT. IEEE Access 12: 52215-52226 (2024) - [j4]Yiran Chen
Athena - The NSF AI Institute for Edge Computing. AI Mag. 45(1): 15-21 (2024) - [c16]Janani Aravind
Comprehensive Analysis of Generated Single Event Transients in Most Common Logic Cells of Skywater's 130-nm Technology. ACM Great Lakes Symposium on VLSI 2024: 333-337 - 2023
- [j3]Yohannes Belayneh Bekele
A Survey of QEMU-Based Fault Injection Tools & Techniques for Emulating Physical Faults. IEEE Access 11: 62662-62673 (2023) - 2022
- [c15]Semiu A. Olowogemo, Hao Qiu, Bor-Tyng Lin, William H. Robinson, Daniel B. Limbrick:
Model-Based Analysis of Single-Event Upset (SEU) Vulnerability of 6T SRAM Using FinFET Technologies. DFT 2022: 1-4 - [c14]Hao Qiu, Semiu A. Olowogemo, Bor-Tyng Lin, William H. Robinson, Daniel B. Limbrick:
Understanding time-varying vulnerability accross GPU Program Lifetime. DFT 2022: 1-6 - [c13]Yohannes Belayneh Bekele, Daniel B. Limbrick
Evaluating the Impact of Hardware Faults on Program Execution in a Microkernel Environment. HOST 2022: 149-152 - 2021
- [c12]Hao Qiu, Bor-Tyng Lin, Semiu A. Olowogemo
Evaluating Soft Error Mitigation Trade-offs During Early Design Stages. ARCS 2021: 213-228 - 2020
- [c11]Hao Qiu, Xiaoxing Qiu, Semiu A. Olowogemo
Gem5Panalyzer: A Light-weight tool for Early-stage Architectural Reliability Evaluation & Prediction. MWSCAS 2020: 482-485 - [c10]Semiu A. Olowogemo
Electrical Masking Improvement with Standard Logic Cell Synthesis Using 45 nm Technology Node. MWSCAS 2020: 619-622
2010 – 2019
- 2019
- [c9]Semiu A. Olowogemo
Pulse Broadening in Combinational Circuits with Standard Logic Cell Synthesis. MWSCAS 2019: 215-218 - 2018
- [c8]Semiu A. Olowogemo
Effects of Voltage and Temperature Variations on the Electrical Masking Capability of Sub-65 nm Combinational Logic Circuits. DFT 2018: 1-6 - 2017
- [c7]Hao Qiu, Richard A. Peters, William H. Robinson
The effects of radiation-induced soft errors on hardware implementations of object-tracking algorithms. MWSCAS 2017: 393-396 - 2015
- [j2]Bradley T. Kiddie, William H. Robinson
Single-Event Multiple-Transient Characterization and Mitigation via Alternative Standard Cell Placement Methods. ACM Trans. Design Autom. Electr. Syst. 20(4): 60:1-60:22 (2015) - [c6]Christopher Osiegbu, Seifemichael B. Amsalu
Design and Implementation of an Autonomous Wireless Sensor-Based Smart Home. ICCCN 2015: 1-7 - 2013
- [j1]Nihaar N. Mahatme, Indranil Chatterjee
An efficient technique to select logic nodes for single event transient pulse-width reduction. Microelectron. Reliab. 53(1): 114-117 (2013) - [c5]Young-Joon Lee, Daniel B. Limbrick
Power benefit study for ultra-high density transistor-level monolithic 3D ICs. DAC 2013: 104:1-104:10 - 2012
- [c4]Trey Reece
Stealth assessment of hardware Trojans in a microcontroller. ICCD 2012: 139-142 - [c3]Daniel B. Limbrick
Impact of Logic Synthesis on Soft Error Rate of Digital Integrated Circuits. ISVLSI 2012: 3-4 - 2011
- [c2]Daniel B. Limbrick
Impact of Synthesis Constraints on Error Propagation Probability of Digital Circuits. DFT 2011: 103-111 - [c1]Trey Reece
Design Comparison to Identify Malicious Hardware in External Intellectual Property. TrustCom 2011: 639-646
Coauthor Index
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last updated on 2024-08-05 21:21 CEST by the dblp team
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