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Perttu Salmela
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2010 – 2019
- 2011
- [j6]Tomasz Patyk, Perttu Salmela, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala:
Design Methodology for Offloading Software Executions to FPGA. J. Signal Process. Syst. 65(2): 245-259 (2011) - [c20]Janne Janhunen, Perttu Salmela, Olli Silvén, Markku J. Juntti:
Fixed- versus floating-point implementation of MIMO-OFDM detector. ICASSP 2011: 3276-3279
2000 – 2009
- 2009
- [j5]Perttu Salmela, Juho Antikainen, Teemu Pitkänen, Olli Silvén, Jarmo Takala:
3G Long Term Evolution Baseband Processing with Application-Specific Processors. Int. J. Digit. Multim. Broadcast. 2009: 503130:1-503130:13 (2009) - [c19]Lassi Nurmi, Perttu Salmela, Pertti Kellomäki, Pekka Jääskeläinen, Jarmo Takala:
Reconfigurable video decoder with transform acceleration. SiPS 2009: 081-086 - 2008
- [j4]Perttu Salmela, Harri Sorokin, Jarmo Takala:
A Programmable Max-Log-MAP Turbo Decoder Implementation. VLSI Design 2008: 319095:1-319095:17 (2008) - [c18]Perttu Salmela, Adrian Burian, Harri Sorokin, Jarmo Takala:
Complex-valued QR decomposition implementation for MIMO receivers. ICASSP 2008: 1433-1436 - [c17]Juho Antikainen, Perttu Salmela, Olli Silvén, Markku J. Juntti, Jarmo Takala, Markus Myllylä:
Fine-grained application-specific instruction set processor design for the K-best list sphere detector algorithm. ICSAMOS 2008: 108-115 - [c16]Perttu Salmela, Harri Sorokin, Jarmo Takala:
Low-complexity polynomials modulo integer with linearly incremented variable. SiPS 2008: 251-256 - 2007
- [j3]Juho Antikainen, Perttu Salmela, Olli Silvén, Markku J. Juntti, Jarmo Takala, Markus Myllylä:
Application-Specific Instruction Set Processor Implementation of List Sphere Detector. EURASIP J. Embed. Syst. 2007 (2007) - [j2]Tuomas Järvinen, Perttu Salmela, Harri Sorokin, Jarmo Takala:
Stride Permutation Networks for Array Processors. J. VLSI Signal Process. 49(1): 51-71 (2007) - [c15]Perttu Salmela, Ruirui Gu, Shuvra S. Bhattacharyya, Jarmo Takala:
Efficient parallel memory organization for turbo decoders. EUSIPCO 2007: 831-835 - [c14]Perttu Salmela, Chung-Ching Shen, Shuvra S. Bhattacharyya, Jarmo Takala:
Synthesis of DSP Architectures Using Libraries of Coarse-Grain Configurations. SiPS 2007: 475-480 - [c13]Perttu Salmela, Juho Antikainen, Olli Silvén, Jarmo Takala:
Memory-Based List Updating for List Sphere Decoders. SiPS 2007: 633-638 - 2006
- [c12]Tuomas Järvinen, Perttu Salmela, Konsta Punkka, Jarmo Takala:
Evaluation of stride permutation networks. ISCAS 2006 - [c11]Perttu Salmela, Risto Mäkinen, Pekka Jääskeläinen, Jarmo Takala:
Loop Scheduling for Transport Triggered Architecture Processors. SoC 2006: 1-4 - [c10]Perttu Salmela, Chung-Ching Shen, Shuvra S. Bhattacharyya, Jarmo Takala:
Register File Partitioning with Constraint Programming. SoC 2006: 1-4 - [c9]Perttu Salmela, Pekka Jääskeläinen, Tuomas Järvinen, Jarmo Takala:
Software Pipelining Support for Transport Triggered Architecture Processors. SAMOS 2006: 237-247 - 2005
- [j1]Tuomas Järvinen, Perttu Salmela, Teemu Sipilä, Jarmo Takala:
Systematic approach for path metric access in Viterbi decoders. IEEE Trans. Commun. 53(5): 755-759 (2005) - [c8]Adrian Burian, Perttu Salmela, Jarmo Takala:
Complex Fixed-Point Matrix Inversion Using Transport Triggered Architecture. ASAP 2005: 107-112 - [c7]Perttu Salmela, Tuomas Järvinen, Teemu Sipilä, Jarmo Takala:
256-State Rate 1/2 Viterbi Decoder on TTA Processor. ASAP 2005: 370-378 - [c6]Tuomas Järvinen, Perttu Salmela, Panu Hämäläinen, Jarmo Takala:
Efficient byte permutation realizations for compact AES implementations. EUSIPCO 2005: 1-4 - 2004
- [c5]Tuomas Järvinen, Perttu Salmela, Harri Sorokin, Jarmo Takala:
Stride Permutation Networks for Array Processors. ASAP 2004: 376-386 - 2003
- [c4]Perttu Salmela, Tuomas Järvinen, Teemu Sipilä, Jarmo Takala:
On allocation of turbo decoder iterations. PIMRC 2003: 157-160 - [c3]Perttu Salmela, Tuomas Järvinen, Teemu Sipilä, Jarmo Takala:
Parallel memory access in turbo decoders. PIMRC 2003: 2157-2161 - [c2]Tuomas Järvinen, Perttu Salmela, Teemu Sipilä, Jarmo Takala:
In-Place Storage of Path Metrics in Viterbi Decoders. VLSI-SOC 2003: 295-300 - 2001
- [c1]Jarmo Takala, Tuomas Järvinen, Perttu Salmela, David Akopian:
Multi-port interconnection networks for radix-R algorithms. ICASSP 2001: 1177-1180
Coauthor Index
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