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Microprocessors and Microsystems, Volume 52
Volume 52, July 2017
- Christos-Savvas Bouganis
, Marek Gorgon, Vanderlei Bonato
Special issue on applied reconfigurable computing. 1 - Jones Yudi Mori
System-level design space identification for Many-Core Vision Processors. 2-22 - Amin Rezaei, Masoud Daneshtalab
CAP-W: Congestion-aware platform for wireless-based network-on-chip in many-core era. 23-33 - Sadegh Sadeghi
Cryptanalysis of reduced QTL block cipher. 34-48 - Pritam P. Chougule, Bibhash Sen, Tukaram D. Dongale
Realization of processing In-memory computing architecture using Quantum Dot Cellular Automata. 49-58 - Gurmohan Singh
Design and analysis of area efficient QCA based reversible logic gates. 59-68 - Mahsa Keramati, Mehdi Modarressi, Seyed Hossein Seyedahaei Rezaei:
Thermal management in 3d networks-on-chip using dynamic link sharing. 69-79 - Konstantinos Tatas
Hardware implementation of dynamic fuzzy logic based routing in Network-on-Chip. 80-88 - Maher Fakih, Alina Lenz, Mikel Azkarate-askasua
SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems. 89-105 - Marko Perkovic
Accommodating larger container vessels using an integrated laser system for approach and berthing. 106-116 - Ariel Oleksiak
M2DC - Modular Microserver DataCentre with heterogeneous hardware. 117-130 - Anju P. Johnson
Remote dynamic partial reconfiguration: A threat to Internet-of-Things and embedded security applications. 131-144 - Jakub Podivinsky, Ondrej Cekan
Functional verification based platform for evaluating fault tolerance properties. 145-159 - Jahanzeb Anwer, Marco Platzner
Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. 160-172 - Marcin Kubica
Logic synthesis for FPGAs based on cutting of BDD. 173-187 - Milos Panic
Adapting TDMA arbitration for measurement-based probabilistic timing analysis. 188-201 - William Diehl, Kris Gaj:
RTL implementations and FPGA benchmarking of selected CAESAR Round Two authenticated ciphers. 202-218 - Radovan Stojanovic, Lech Józwiak:
Special issue on cyber-physical systems. 219-220 - Shounak Chakraborty, Hemangee K. Kapoor:
Performance linked dynamic cache tuning: A static energy reduction approach in tiled CMPs. 221-235 - Jan Belohoubek
Error masking method based on the short-duration offline test. 236-250 - Jaroslav Borecký, Martin Kohlík, Hana Kubátová:
Parity driven reconfigurable duplex system. 251-260 - Wendell F. S. Diniz, Vincent Frémont
An FPGA-based architecture for embedded systems performance acceleration applied to Optimum-Path Forest classifier. 261-271 - Mahmoud Hussein
Safe adaptation of vehicle software systems. 272-286 - Farheen Fatima Khan, Andy Gean Ye:
A study on the accuracy of minimum width transistor area in estimating FPGA layout area. 287-298 - Paolo Burgio, Marko Bertogna, Nicola Capodieci, Roberto Cavicchioli, Michal Sojka, Premysl Houdek, Andrea Marongiu, Paolo Gai, Claudio Scordino, Bruno Morelli:
A software stack for next-generation automotive systems on many-core heterogeneous platforms. 299-311 - Yiwen Zhang, Huizhen Zhang, Cheng Wang:
Reliability-aware low energy scheduling in real time systems with shared resources. 312-324 - Robert Hesselbarth, Johann Heyszl, Georg Sigl:
Fast and reliable PUF response evaluation from unsettled bistable rings. 325-332 - Houcine Hassan, Laurence T. Yang, Jason Xue, Eugenio Villar:
Special issue on: "Heterogeneous architectures for Cyber-physical systems (HACPS)". 333-334 - Cristian Chilipirea
An integrated architecture for future studies in data processing for smart cities. 335-342 - Duo Liu, Lei Yao, Linbo Long, Zili Shao
A workload-aware flash translation layer enhancing performance and lifespan of TLC/SLC dual-mode flash memory in embedded systems. 343-354 - Mario Donato Marino, Kuan-Ching Li
System implications of LLC MSHRs in scalable memory systems. 355-364 - Jianhai Chen, Qinming He, Deshi Ye, Wenzhi Chen, Yang Xiang, Kevin Chiew, Liangwei Zhu:
Joint affinity aware grouping and virtual machine placement. 365-380 - Macarena Espinilla
Optimizing the configuration of an heterogeneous architecture of sensors for activity recognition, using the extended belief rule-based inference methodology. 381-390 - Longbin Chen
Novel online data allocation for hybrid memories on tele-health systems. 391-400 - Wei Jiang, Paul Pop
Design optimization for security- and safety-critical distributed real-time applications. 401-415 - Hyungjoo Kim, Jungho Kang
A light-weight secure information transmission and device control scheme in integration of CPS and cloud computing. 416-426 - Xuanzhang Liu
Energy-Aware on-chip virtual machine placement for cloud-supported cyber-physical systems. 427-437 - João Canas Ferreira
MICPRO DSD 2015 special issue. 438 - Mladen Skelin, Marc Geilen
Worst-case performance analysis of SDF-based parameterized dataflow. 439-460 - Alistair A. McEwan
Reliability and performance enhancements for SSD RAID. 461-469 - Hannes Groß, Erich Wenger, Christoph Dobraunig
Ascon hardware implementations and side-channel evaluation. 470-479 - Jorge Santos, Daniel C. Dinis, Diogo Riscado, Gustavo Anjos
A flexible physical layer and fronthaul research testbed for C-RAN. 480-490 - Philipp Koppermann, Fabrizio De Santis, Johann Heyszl, Georg Sigl:
Low-latency X25519 hardware implementation: breaking the 100 microseconds barrier. 491-497 - Martin Danhel, Filip Stepánek, Hana Kubátová:
The effect of the transient faults in dependability prediction. 498-504 - Vyacheslav P. Koryachko, Dmitry A. Perepelkin
Adaptive rerouting of data flows in distributed data Centers. 505-509 - Nick A. Petrovsky
Embedded distributed arithmetic based quaternions multiplier of paraunitary filter bank for lossless-to-lossy image coding. 510-522 - Gabriela Breaban, Martijn Koedam, Sander Stuijk
Time synchronization for an emulated CAN device on a Multi-Processor System on Chip. 523-533 - Martin Novotný
Cryptanalytic attacks on cyber-physical systems. 534-539 - Dimitris Theodoropoulos, Somnath Mazumdar
The AXIOM platform for next-generation cyber physical systems. 540-555 - Cezar Reinbrecht
Timing attack on NoC-based systems: Prime+Probe attack and NoC-based protection. 556-565 - Sami Malek, Sarah Abdallah, Ali Chehab
Low-power and high-speed shift-based multiplier for error tolerant applications. 566-574
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