default search action
Microprocessing and Microprogramming, Volume 24
Volume 24, Numbers 1-5, August 1988
- Lutz Richter:
Chairman's introduction. vii - Lutz Richter:
Opening and keynote session. 1 - Niklaus Wirth:
Oberon: A system for workstations. 3-8 - Hubert Huschke:
Communications strategies in international banking. 9 - Hubert Huschke:
Communication strategies in international banking. 11-13 - Joseph A. Fisher:
Microprogramming, microprocessing and supercomputing. 15 - Joseph A. Fisher:
Microprogramming, microprocessing and supercomputing. 17-20 - Helmut Painke:
Microelectronics: the VLSI-/370 microprocessor I. 21 - Helmut Painke:
VLSI-/370 microprocessor overview. 23-27 - Helmut Schettler:
VLSI-/370 microprocessor chip technology. 29-33 - Wolfgang Roesner:
The logic design language and verification environment for the VLSI-/370. 35-42 - Bernhard Kick:
Logic synthesis in the design of the VLSI-/370 microprocessor. 43-47 - John Mølgaard:
Software engineering: System aspects. 49 - Antti Auer, Pekka Kemppainen, Ari Okkonen
, Veikko Seppänen
Automated code generation of embedded real-time systems. 51-55 - Massimo Ancona, Andrea Clematis
Two language levels for system programming. 57-62 - Fausto Distante, Donatella Sciuto
Behavioral testing of multilevel system software. 63-70 - Friedrich Mayer-Lindenberg:
Practical multiprocessor and realtime programming in the fifth programming environment. 73-78 - Dharma P. Agrawal, Jon Mauney, L. Taylor Simpson:
Structure of a parallelizing compiler for the B-HIVE multicomputer. 79-84 - Massimo Ancona, T. Bottino, Andrea Clematis
LINDA: An allocator for embedded multiprocessor systems. 85-92 - Yehuda Wallach, E. Yaprak:
Use of local-area networks as alternating sequential-parallel systems. 95-102 - Michel N. X. Dang, Christophe Diot, I. Sabouni, L. Sponga:
Specific data structure intended for the implementation of high level ISO standards: Associated algorithms and dedicated hardware. 103-110 - Patrick M. J. Hellemans, Hubert J. M. Decuypere:
Automatic protocol generation based on x.409 specifications. 111-119 - Harald Schumny:
Short notes I. 121 - Siegfried Heinkele:
Timing verification for the VLSI-/370 microprocessor. 125-129 - Uwe Schulz:
Hierarchical physical design system for VLSI-/370 microprocessor. 131-135 - Harald Gerst:
Verification of the VLSI-/370 microprocessor. 137-145 - Erik F. Dirkx, Jacques Tiberghien:
An animated simulation environment for microprocessors. 149-152 - Thomas Bemmerl, Norbert Erl, Olav Hansen:
Menu and graphic driven human interfaces for high level debuggers. 153-159 - Malcolm Verrall:
PCTE - The kernel of software engineering environments. 161-165 - Kevin Murray, Andy J. Wellings:
Issues in the design and implementation of a distributed operating system for a network of transputers. 169-177 - Herman Moons, Pierre Verbaeten:
Software development in server-oriented systems the HERMIX approach. 179-185 - Yolande Berbers, Pierre Verbaeten:
Design of the Hermix distributed operating system: Structural aspects. 187-193 - Philippe O. A. Navaux, Paulo Fernandes
SARA: A processor interconnection performance analysis tool. 197-204 - Gert Van Der Jeugt, Erik F. Dirkx, Jacques Tiberghien:
Protocol description and simulation in the OCCAM programming language. 205-207 - Francesco Curatelli, Giacomo M. Bisio, Giovanni Borghero, Ermanno Di Zitti:
A behavioural simulator and its use for the validation of hypercube architectures. 213-218 - Raivo Raud:
A language environment for asic design. 219-226 - Jozef A. De Man:
Designing digital systems with a function language. 227-232 - C. Matthäus, B. Krüger-Sprengel, C. Glowacz, Uwe Hübner, Heinrich Theodor Vierhaus:
CMOS fault modeling, test generation and design for testability. 233-238 - Steven T. Krolak, Valentin Antipa:
DEOS - A dynamically extendible object-oriented system. 241-248 - Louis Marinos, Mike P. Papazoglou
Enhancing intermodel transformations in a distributed object-oriented database system. 249-255 - Klaus W. Pleßmann, L. Tassakos:
Concurrent, object-oriented program design in real-time systems. 257-265 - Dimitris N. Christodoulakis:
Petri net semantics of smalltalk-80. 267-272 - Jacques Tiberghien:
Parallel processing: Transputers I. 273 - P. Knoppers, Ad J. van de Goor, O. M. Gunhildsbu, P. Stravers:
Transputer network with flexible topology. 275-279 - Pradip K. Das, D. Q. M. Fay:
Performance studies of multi-transputer architectures with static and dynamic links. 281-289 - Winfried Hahn, H. Anger, Andreas Hagerer, B. Schuster:
A multi-transputer-net as a hardware simulation environment. 291-298 - Franz J. Rammig, Martin Schrewe, Gerhard Vorloeper:
A transputer-based accelerator for multilevel digital simulation. 299-305 - Ferenc Vajda:
Applications: Image and speech processing. 307 - A. D. Houghton, Nicholas Luke Seed
A computer architecture for real time image processing using VLSI. 309-314 - P. Fernin, Stephen C. Winter, Derek R. Wilson, H. Reignier:
Implementation of an intelligent SAR image registration system. 315-324 - Ad J. van de Goor, G. J. Nanninga:
Speech synthesis system with unlimited vocabulary for the Dutch language. 325-333 - Harald Schumny:
Short notes II. 335 - Reiner W. Hartenstein:
Microelectronics: VLSI design tools I. 337 - A. Fox, C. T. Spracklen, C. P. Jolly:
Logic synthesis with constraints. 339-346 - Zebo Peng:
Let's design asynchronous VLSI systems. 347-352 - Anna Antola:
Evaluation of complexity for different layouts of butterfly networks. 353-359 - Josef de Man:
Session D2: Software engineering: Formal methods I. 361 - Ingo Eichenseher, Theo Ungerer, Eberhard Zehendner:
CADL - A formal description language for parallel computer architectures. 363-370 - Jeffrey J. Joyce:
Formal specification and verification of microprocessor systems. 371-378 - Bjarne Gertz Pedersen:
Design of real time systems. - A method and a tool. 379-385 - O. Boudillet, Stephen C. Winter, Derek R. Wilson:
The implementation of a functional machine on a transputer network. 389-396 - Kenneth Adamson, G. Donnan, Norman D. Black:
Simple transformation rules in the application of transputers to the physiological processing of speech. 397-402 - Mark B. Sandler, Shirin Eghtesadi:
Transputer based implementations of the hough transform for computer vision. 403-408 - John Billingsley:
Applications: Sensors and robotics. 409 - Ralf Hinkel, Thomas Knieriemen, Ewald von Puttkamer:
A rotating laser range finder and attached data interpretation for use in an autonomous mobile robot. 411-418 - Bing Lam Luk
Stochastic force sensing application in robotics. 419-423 - H. Guiheux, C. Mardapittas, Derek R. Wilson, Stephen C. Winter:
A model based recognition system for tactile data. 425-431 - Jan Wilmink:
Computer music I. 433 - Goffredo Haus
Music processing at L.I.M. 435-441 - Fiorella Terenzi:
The computer audio research laboratory at the center for music experiment and related research. 443-446 - Timo Juntunen, Jorma Kivelä, Auli Reinikka, Matti Sipola, Juha-Pekka Soininen, Kari Tiensyrjä, Tuomo Tikkanen:
Real-time structured analysis in system level design of embedded ASICs. 449-454 - Tore Sæter:
Software techniques for integrating text and graphics in VLSI CAD tools. 455-460 - Rainer Buschke, Klaus Lagemann:
Error retracing and fault localization techniques within Simueva, a system for evaluation of simulation results. 461-468 - Volker Gruhn, Matthias Hallmann:
A Petri Net based compiler for the prototyping language RELOS. 471-482 - G. León, S. Marchena:
Formal conversion between LOTOS specification and Galileo nets. 483-490 - H. Zedan:
On the analysis of occam real-time distributed computations. 491-500 - Roger D. Hersch, Franco Maddaleno, C. Nicks, M. Bürki:
The video-ram multiprocessor architecture. 503-509 - Valmir C. Barbosa
Specification of a communication virtual processor for parallel processing systems. 511-518 - Gerard J. M. Smit, Pierre G. Jansen:
The communication processor of TUMULT-64. 519-524 - Reinhard H. Rauscher, Peter Kückendahl, Michael Payer:
A system for estimation of numerical stability for matrix operations in systolic arrays. 527-534 - N. Stanley Scott, Lionel C. Waring, Peter Milligan, Danny Crookes, P. L. Kilpatrick, Philip J. Morrow:
A comparison of programming paradigms for the parallel computation of racah coefficients: An application of transputers to computational atomic physics. 535-539 - Thomas Bemmerl, Thomas Bonk:
Optimizing cache parameters using CAE workstations. 541-546 - A. T. Clarke, B. M. Brown, M. P. Thorne:
Using a micro to automate data acquisition in music publishing. 549-553 - Peter J. Comerford, Barry Eaglestone:
Bradford musical instrument simulator and workstation. 555-561 - Daniel Tabak:
Microelectronics: Processor architectures I. 563 - Antonio González
A mechanism for reducing the cost of branches in RISC architectures. 565-572 - Jordi Cortadella
Designing a branch target buffer for executing branches with zero time cost in a RISC processor. 573-580 - Manuel Lois Anido, David J. Allerton, E. J. Zaluska:
The architecture of RIG: A RISC for image generation in a multi-microprocessor environment. 581-588 - Alain Dumont, Éric Gilson, Charles Trullemans:
BRISC: A RISC biprocessor architecture dedicated to power applications. 589-596 - Rüdiger W. Brause:
Parallel processing: Function-directed and neural architectures. 597 - Rubén González-Rubio, Michel Couprie:
DDC: Delta driven computer, and μSyC: microprogrammable symbolic coprocessor. 599-606 - M. De Blasi, A. Gentile, G. Lopez, A. Franco
Parallel backtracking prolog engine. 607-611 - Nathalie Devesa, Gilles Goncalves
A controlled reduction model of functional programs on a distributed associative network. 613-620 - Jeremy Cook, John Gilbert:
Parallel neural network simulation using sparse matrix techniques. 621-626 - Fausto Distante:
Parallel processing: Array processors I. 627 - Vincenzo Piuri:
Fault-tolerant hexagonal arithmetic array processors. 629-636 - Luca Breveglieri:
Design and implementation of a VLSI serial multiplier for fixed point numbers with self-checking capability. 637-645 - Emilio L. Zapata, Ramon Doallo, Francisco F. Rivera, M. A. Ismail:
A VLSI systolic architecture for fuzzy clustering. 647-654 - S. F. Reddaway, Roderic M. R. Page:
High speed data searching with a processor array. 655-660 - Jukka Karjalainen:
Applications: Real time systems. 661 - Hans Kurmann, Bogdan Lent, Reto Marti:
Declarative programming of the embedded control systems based on OR-ed dataflow operational principle. 663-672 - A. Katbab:
A multiprocessor architecture for robot-arm control. 673-680 - Miroslav Jockovic:
An application of petri-nets in the control system of the FTC. 681-686 - Wolfgang A. Halang:
Parallel administration of events in real-time systems. 687-692 - Daniel Tabak:
Microelectronics: Processor architectures II. 693 - Vojin G. Oklobdzija:
Issues in CPU-coprocessor communication and synchronization. 695-700 - Eddy H. Debaere:
A language coprocessor as a HLL directed architecture. 701-707 - Elliot J. Cohen, Reuven A. Marko, Jonathan Levy:
Integrating an on-chip MMU into a highly pipelined architecture. 709-713 - Mario Dal Cin:
Session G2: Parallel processing: Fault tolerance I. 715 - Nick Kanopoulos, Peter N. Marinos:
Design of a bus-monitor for real-time applications. 717-721 - Kaiyuan Huang:
Diagnosability of system faults with propagation under asymmetric invalidation. 723-730 - Jerzy Tyszer:
Multiple fault diagnosis for interconnection networks for distributed systems. 731-734 - Massimo Maresca, Hungwen Li:
A VLSI implementation of polymorphic-torus architecture. 737-742 - Shi-Yao Jin, Shuan Zhao, Shi-Sheng Yie:
A vectorized superminicomputer, VAX-11/700 with vector processing. 743-746 - Argy Krikelis, R. Mike Lea:
An associative string processor architecture for parallel processing applications. 747-754 - Friedrich Winkelhage:
Applications: Education I. 755 - Alan Chalmers:
OCCAM - The language for educating future parallel programmers? 757-760 - Michael Collier:
A software training environment for electronic engineers using unix, modula-2 and a local area network. 761-765 - Paul Loewenstein, Andrew Fox:
Closing the semantic gap. 767-772 - Roberto Negrini:
Microelectronics: Fault tolerance and reliability. 773 - Guy A. S. Wingate, Clive Preece:
Transient fault recovery assessment in 8 and 16 bit microprocessor based controllers in embedded systems. 775-782 - Janusz Sosnowski
Concurrent checking of program flow using single-chip microcomputers. 783-789 - Mario Dal Cin:
Parallel processing: Fault Tolerance II. 791 - Geoffrey F. Carpenter:
State space modelling in the design of robust software for distributed systems: A case study. 793-799 - D. J. Holding, M. R. Hill, G. F. Carpenter:
The design of distributed, software fault tolerant, real-time systems incorporating decision mechanisms. 801-806 - Rüdiger W. Brause:
Session H3: Parallel processing: Concurrent program design. 807 - Antti Valmari:
PC-Rimst - a tool for validating concurrent program designs. 809-818 - Peter Brezany:
Parallel parsing in a multiprocessor environment. 819-826 - Friedrich Winkelhage:
Session H4: Applications: Education II. 827 - Ulf Sandberg, Torsten Cegrell:
Computer systems for real-time process control and supervision A framework for education based on a systems-engineering approach. 829-833 - Richard N. Zobel:
Real-time systems education in computer science at Manchester University. 835-840
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-10-07 01:24 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: