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13th LASCAS 2022: Puerto Varas, Chile
- 13th IEEE Latin America Symposium on Circuits and System, LASCAS 2022, Puerto Varas, Chile, March 1-4, 2022. IEEE 2022, ISBN 978-1-6654-2008-2
- Lucas Ribeiro, Ricardo P. Jacobi, Francisco Júnior, Jones Yudi Mori Alves da Silva, Ivan Saraiva Silva:
Evaluating a Machine Learning-based Approach for Cache Configuration. 1-4 - Duong Nghiep Huy, Guowei Chen, Kiichi Niitsu
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22nm CMOS pW Standby Power Flip-Flops with/without Security using Dynamic Leakage Suppression Logic. 1-4 - Fabián Olivera, Lucas Souza da Silva, Antonio Petraglia:
Ultra-Low-Power CMOS Voltage Reference Topologies Regarding Technology Node. 1-4 - Brunno A. Abreu, Guilherme Paim, Jorge Castro-Godínez, Mateus Grellert
On the Netlist Gate-level Pruning for Tree-based Machine Learning Accelerators. 1-4 - David Palomeque-Mangut
A Wide-Range, High-Voltage, Floating Level Shifter with Charge Refreshing in a Standard 180 nm CMOS Process. 1-4 - Vishnuvardhan Gundlapalle, Amit Acharyya:
A Novel Single Lead to 12-Lead ECG Reconstruction Methodology Using Convolutional Neural Networks and LSTM. 1-4 - Bruno Canal, Hamilton Klimach, Sergio Bampi, Tiago R. Balen:
Hybrid Comparator and Window Switching Scheme for low-power SAR ADC. 1-4 - Guilherme B. Manske, Clayton R. Farias, Paulo F. Butzen
A Fast Approximate Function Generation Method to ATMR Architecture. 1-4 - Piyush Kumar, Dario Stajic, Erkan Nevzat Isa, Linus Maurer:
26 GHz VCO in 22 nm FDSOI Technology for RADAR Application. 1-4 - Benjamin Coquillas, Eric Kerherve, Anne-Charlotte Amiaud, Laurent Roussel, Samuel Redois, Bruno Louis, Thomas Merlet, Vincent Petit:
A Highly Compact 1W Ku-Band Power Amplifier. 1-4 - Prasannata Bhange, Deepak Kumar Joshi, Amit Acharyya, Sunil Kumar Pandu, Kamal Mankari, Swati Ghosh Acharyya, K. Sridhar:
Phase Space Reconstruction Based Real Time Fatigue Crack Growth Estimation for Structural Health Monitoring Ships. 1-4 - Sergio Diaz, Johan I. Guzman, Claudio Tenreiro, Roberto O. Ramírez, Oscar Hernandez:
A Low-Cost Cold Plasma Generator Circuits Designed for Laboratory Applications. 1-4 - Masoud Shahshahani, Dinesh Bhatia
PPA Based CNN Architecture Explorer. 1-4 - Esteban Garzón
Voltage and Technology Scaling of DMTJ-based STT-MRAMs for Energy-Efficient Embedded Memories. 1-4 - Vasileios Leon, Georgios Makris, Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris
MAx-DNN: Multi-Level Arithmetic Approximation for Energy-Efficient DNN Hardware Accelerators. 1-4 - Xujiaming Chen, Guowei Chen, Xinyang Yu, Yue Wang, Kiichi Niitsu
A 52.3% Peak Efficiency 22nm CMOS Low-Power Light-Adaptive Self-Oscillating Voltage Doubler Using Scalable Dynamic Leakage-Suppression Logic. 1-4 - Gui-Yi Dong
Notch Frequency Generation Methods in Noise Spread Spectrum for Pulse Coding Switching DC-DC Converter. 1-4 - Enzo Pacilio, Alejo Silvarrey, Alvaro Pardo:
UAVs vs Satellites: Comparison of tools for water quality monitoring. 1-4 - Andres Asprilla, Andreia Cathelin, Yann Deval:
Highly Linear Large Signal Compact Voltage-to-Current Converter in 28 nm FD-SOI Technology. 1-4 - Maximilian Scherzer
Implementation of a Fully Differential Low Noise Current Source for Fluxgate Sensors. 1-4 - Laysson Oliveira Luz, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar P. Vilela Neto:
An NML in-plane Wire Crossing Structure. 1-4 - Palak Yash, Mansi Thakare, Babita Jajodia:
Optimized Hardware Implementation of Vedic Binary Multiplier using Nikhilam Sutra on FPGA. 1-4 - Kevin Vicuña, Luis-Miguel Prócel
DMTJ-Based Non-Volatile Ternary Content Addressable Memory for Energy-Efficient High-Performance Systems. 1-4 - Gabriel C. Duarte, Duarte Lopes de Oliveira, Gracieth Cavalcanti Batista:
Design of Asynchronous Pipelines with QDI Template Using Commercial FPGA. 1-4 - Shoya Sonoda, Jun Shiomi, Hidetoshi Onodera:
Approximation-Based Implementation for a Minimum Energy Point Tracking Algorithm over a Wide Operating Performance Region. 1-4 - Fernando J. Costa
SOI UTBB Capacitive Cross-Coupling Effects in Ultimate Technological Nodes. 1-4 - Minghao Li
An integrated circuit to enable electrodeposition and amperometric readout of sensing electrodes. 1-4 - Mattia Barezzi, Umberto Garlando, Francesca Pettiti, Luca Nari, Davide Gisolo, Davide Canone, Danilo Demarchi:
Long-Range Low-Power Soil Water Content Monitoring System for Precision Agriculture. 1-4 - Victor Grimblatt, Guillaume Ferré, Francois Rivet, Christophe Jégo:
An IoT SoC for Agricultural Applications. 1-4 - Juan Sapriza
Smart devices and RFID: towards an Android-based information system in the cattle-yards. 1-4 - Md. Sazzad Hossain, Mateus Bernardino Moreira, Francois Sandrez, Francois Rivet, Hervé Lapuyade, Yann Deval:
Low Power Frequency Dividers using TSPC logic in 28nm FDSOI Technology. 1-4 - Renzo Barraza, Angel Abusleme, Sergey Kuleshov
TISIRC: A multichannel ASIC with gain control for SiPM detectors. 1-4 - Tatiana Moposita, Lionel Trojman, Felice Crupi, Marco Lanuzza
Voltage-to-Voltage Sigmoid Neuron Activation Function Design for Artificial Neural Networks. 1-4 - Francisco Veirano, Pablo Perez-Nicoli, Nicolás Gammarano, German Fierro, Fernando Silveira:
Near threshold pulse transit time processor for central blood pressure estimation. 1-4 - Patrícia U. L. da Costa, Pedro Tauã Lopes Pereira, Brunno A. Abreu, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi:
Improved Approximate Multipliers for Single-Precision Floating-Point Hardware Design. 1-4 - Diego Barrettino
Sensor Systems for Smart Agriculture. 1-4 - Henrique Kessler
Calibration of Logical Effort Transistor Sizing for On-the-Fly Low-Power Supergate Design. 1-4 - Marcio Monteiro, Ismael Seidel, Mateus Grellert
Exploring the Impacts of Multiple Kernel Sizes of Gaussian Filters Combined to Approximate Computing in Canny Edge Detection. 1-4 - Sora Kato, Guowei Chen, Kiichi Niitsu
An Ultra-Low Power 22 nm Self-Oscillating Voltage Doubler With Dynamic Leakage-Suppression Logic. 1-3 - Marco Antonio de Campos Menezes, Tales Cleber Pimenta, Carlos Barreira Martinez:
Validation of a Signal Acquisition for Electrochemical Noise Corrosion Monitoring System. 1-4 - Theodoros Panagiotis Chatzinikolaou, Iosif-Angelos Fyrigos, Vasileios G. Ntinas, Stavros Kitsios, Panagiotis Bousoulas, Michail-Antisthenis I. Tsompanas, Dimitris Tsoukalas, Andrew Adamatzky, Georgios Ch. Sirakoulis:
Memristor-based Oscillator for Complex Chemical Wave Logic Computations: Fredkin Gate Paradigm. 1-4 - Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia
MLSBench: A Benchmark Set for Machine Learning based FPGA HLS Design Flows. 1-4 - Alexis Rodrigo Iga Jadue, Sylvain Engels, Laurent Fesquet:
A Novel Event-Based Method for ASK Demodulation. 1-4 - Ariana Musello, Santiago S. Pérez, Marco Villegas, Luis-Miguel Prócel
Energy-Efficient FinFET-Versus TFET-Based STT-MRAM Bitcells. 1-4 - Olivier Bonnaud:
Technical and pedagogical challenges in micro-nanoelectronics for facing upcoming digital society. 1-4 - Geancarlo Abich
Impact of Thread Parallelism on the Soft Error Reliability of Convolution Neural Networks. 1-4 - Kaya Demir, Salih Ergün:
Random Number Generators Based on Metastable Behavior in Double-Scroll Chaotic Attractors. 1-4 - Onur Karatas, Salih Ergün:
A Digital Random Number Generator Based on Four Regional Examination of Double Scroll Chaos. 1-4 - Anagha Nimbekar, Y. V. Sai Dinesh
VLSI Architecture Design Methodology for Deep learning based Upper Limb and Lower Limb Movement Classification for Rehabilitation Application. 1-4 - Orlando Verducci Jr., Duarte Lopes de Oliveira, Gracieth Cavalcanti Batista:
Fault-Tolerant Finite State Machine Quasi Delay Insensitive in Commercial FPGA Devices. 1-4 - Rafael Medina
Full System Exploration of On-Chip Wireless Communication on Many-Core Architectures. 1-4 - Xiu Qi Chang, Ann Feng Chew, Benjamin Chen Ming Choong, Shuhui Wang, Rui Han, Wang He, Li Xiaolin, Rajesh C. Panicker, Deepu John
Atrial Fibrillation Detection Using Weight-Pruned, Log-Quantised Convolutional Neural Networks. 1-4
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