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Chuan Seng Tan
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2020 – today
- 2024
- [i1]Yu Dian Lim, Hong Yu Li, Simon Chun Kiat Goh, Xiangyu Wang, Peng Zhao, Chuan Seng Tan:
Recognizing Beam Profiles from Silicon Photonics Gratings using Transformer Model. CoRR abs/2408.10287 (2024) - 2021
- [c18]Liangxing Hu, Simon Chun Kiat Goh, Yu Dian Lim
, Peng Zhao, Michael Joo Zhong Lim, Chuan Seng Tan:
Multi-Die to Wafer Bonding Through Plasma-Activated Cu-Cu Direct Bonding in Ambient Conditions. 3DIC 2021: 1-5 - 2020
- [c17]Pilsoon Choi, Bugra Kanargi, Kenneth E. Lee, Chirn Chye Boon, Evelyn Wang, Chuan Seng Tan, Dimitri A. Antoniadis, Eugene A. Fitzgerald:
Monolithically Integrated GaN+CMOS Logic Circuits Design and Electro-Thermal Analysis for High-Voltage Applications. BCICTS 2020: 1-4
2010 – 2019
- 2019
- [c16]Alit Apriyana Anak Agung, Peng Zhao, Chuan Seng Tan
TiN Guard Ring Around TSV for Cross-Talk Suppression of Parallel Networking of Data Center. 3DIC 2019: 1-4 - [c15]Jing Tao, Hongyu Li, Peng Zhao, Yu Dian Lim
Design Considerations and Fabrication Challenges of Surface Electrode Ion Trap with TSV Integration. 3DIC 2019: 1-5 - [c14]Simon Chun Kiat Goh, Kailiang Chuan, Chengkuo Lee, Chuan Seng Tan
Mid Infrared Volatile Compounds Detection Using Thermally Reflowed Flip-Stack Die Linear Variable Filter. IEEE SENSORS 2019: 1-4 - 2018
- [c13]Simon Chun Kiat Goh, Li Lynn Shiau, Nan Chen, Kailiang Chuan, Beng Kang Tay
Two-Step Fabrication of Mid-Infrared Linear Variable Optical Filter Using SU-8 as Mask. NEMS 2018: 652-655 - 2017
- [j6]Myat Thu Linn Aung, Takefumi Yoshikawa, Chuan Seng Tan
Yield Enhancement of Face-to-Face Cu-Cu Bonding With Dual-Mode Transceivers in 3DICs. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1023-1031 (2017) - 2016
- [j5]Marvin Chan, Cher Ming Tan
Non-destructive degradation study of copper wire bond for its temperature cycling reliability evaluation. Microelectron. Reliab. 61: 56-63 (2016) - [c12]Ye Lin, Chuan Seng Tan
Through-substrate via (TSV) with embedded capacitor as an on-chip energy storage element. 3DIC 2016: 1-4 - 2015
- [c11]Yuan Yuan Dai, Mei Zhen Ng, P. Anantha, Chee Lip Gan, Chuan Seng Tan
Copper micro and nano particles mixture for 3D interconnections application. 3DIC 2015: TS8.9.1-TS8.9.5 - 2014
- [j4]Wee Loon Ng, Kheng Chok Tee, Junfeng Liu, Yong Chiang Ee, Oliver Aubel, Chuan Seng Tan
Robust Electromigration reliability through engineering optimization. Microelectron. Reliab. 54(9-10): 1666-1670 (2014) - [c10]Wan Chia Ang, Piotr Kropelmcki, Andrew Benson Randies, Alex Yuandong Gu, Kam Chew Leong, Chuan Seng Tan
Simulation and design of AIN piezoelectric resonator for infrared sensing application utilizing lamb wave mode. ISSNIP 2014: 1-6 - 2013
- [j3]Sai Manoj Pudukotai Dinakarrao
Reliable 3-D Clock-Tree Synthesis Considering Nonlinear Capacitive TSV Model With Electrical-Thermal-Mechanical Coupling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1734-1747 (2013) - [c9]Kaushik Ghosh, C. C. Yap, Beng Kang Tay
Integration of CNT in TSV (≤5 μm) for 3D IC application and its process challenges. 3DIC 2013: 1-4 - [c8]Jiye Zhang, Lin Zhang, Yuanwei Dong, Hongyu Li, Cher Ming Tan, Guangrui Xia, Chuan Seng Tan
The dependency of TSV keep-out zone (KOZ) on Si crystal direction and liner material. 3DIC 2013: 1-5 - [c7]Yang Shang, Chun Zhang, Hao Yu, Chuan Seng Tan
Thermal-reliable 3D clock-tree synthesis considering nonlinear electrical-thermal-coupled TSV model. ASP-DAC 2013: 693-698 - 2012
- [j2]Chuan Seng Tan
Low temperature Cu-Cu thermo-compression bonding with temporary passivation of self-assembled monolayer and its bond strength enhancement. Microelectron. Reliab. 52(2): 321-324 (2012) - 2011
- [j1]Kuan-Neng Chen
Integration schemes and enabling technologies for three-dimensional integrated circuits. IET Comput. Digit. Tech. 5(3): 160-168 (2011) - [c6]Dau Fatt Lim, K. C. Leong, Chuan Seng Tan
Selection of underfill material in Cu hybrid bonding and its effect on the transistor keep-out-zone. 3DIC 2011: 1-4 - [c5]Revanth Nadipalli, Ji Fan, Holden King Ho Li
3D integration of MEMS and CMOS via Cu-Cu bonding with simultaneous formation of electrical, mechanical and hermetic bonds. 3DIC 2011: 1-5 - [p1]Chuan Seng Tan:
Three-Dimensional Integration of Integrated Circuits - an Introduction. 3D Integration for NoC-based SoC Architectures 2011: 3-26 - 2010
- [c4]Lan Peng, Hongyu Li, Dau Fatt Lim, Riko I. Made, Guo-Qiang Lo, Dim-Lee Kwong, Chuan Seng Tan
Fine-pitch bump-less Cu-Cu bonding for wafer-on-wafer stacking and its quality enhancement. 3DIC 2010: 1-5
2000 – 2009
- 2009
- [c3]Dau Fatt Lim, Shiv Govind Singh, Xiao Fang Ang, Jun Wei, Chee Mang Ng, Chuan Seng Tan
Achieving low temperature Cu to Cu diffusion bonding with self assembly monolayer (SAM) passivation. 3DIC 2009: 1-5 - [c2]Shiv Govind Singh, Chuan Seng Tan
Impact of thermal through silicon via (TTSV) on the temperature profile of multi-layer 3-D device stack. 3DIC 2009: 1-4 - 2006
- [b1]Chuan Seng Tan:
Multi-layer 3D silicon electronics enabled by wafer bonding. Massachusetts Institute of Technology, Cambridge, MA, USA, 2006 - 2004
- [c1]Shamik Das, Andy Fan, Kuan-Neng Chen, Chuan Seng Tan
Technology, performance, and computer-aided design of three-dimensional integrated circuits. ISPD 2004: 108-115
Coauthor Index
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