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Manuel G. Gericota
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2020 – today
- 2023
- [c29]André Roberto Guerra
, Luciano Frontino de Medeiros
A Review of Immersivity in Distance Higher Education STEM Subjects. iLRN 2023: 543-550 - 2020
- [c28]Pedro Fonseca
Recent activities by IEEE Education Society Portugal Chapter. EDUCON 2020: 1928-1931 - [c27]André V. Fidalgo
EOLES Course - Five Years of Remote Learning and Experimenting. REV 2020: 536-545 - [c26]Paulo Ferreira
e-Engineering Education: Issues and Perspectives for Higher Education Institutions. REV 2020: 546-553
2010 – 2019
- 2019
- [c25]Manuel G. Gericota
The e-LIVES Project: e-Engineering Where and When Students Need. EDUCON 2019: 576-579 - [c24]Manuel G. Gericota
e-Engineering: Remote Labs in an Electronics and Optics e-Learning for Embedded Systems Course. exp.at 2019: 405-409 - [c23]Manuel G. Gericota
e-Engineering: engineering school at home without compromise. ITHET 2019: 1-7 - 2018
- [c22]Manuel G. Gericota
e-LIVES - Extending e-Engineering Along the South and Eastern Mediterranean Basin. REV 2018: 244-251 - 2015
- [c21]Manuel G. Gericota
EOLES course the first accredited on-line degree course in electronics and optics for embedded systems. EDUCON 2015: 403-410 - [c20]André Vaz Fidalgo
EOLES project...teaching unit experiences. TEEM 2015: 517-522 - 2014
- [c19]André Vaz Fidalgo
The EOLES project. EDUCON 2014: 943-946 - 2012
- [j4]Valentim Sousa, Paulo Ferreira
Hey Fellows, We Shrunk the Server. Int. J. Online Eng. 8(S2): 36-41 (2012) - [c18]Francisco R. Fernandes, Ricardo J. Machado
Gatewaying IEEE 1149.1 and IEEE 1149.7 test access ports. IOLTS 2012: 136-137 - 2011
- [j3]André V. Fidalgo
Real-time fault injection using enhanced on-chip debug infrastructures. Microprocess. Microsystems 35(4): 441-452 (2011) - 2010
- [j2]Nuno Sousa, Gustavo R. Alves
An Integrated Reusable Remote Laboratory to Complement Electronics Teaching. IEEE Trans. Learn. Technol. 3(3): 265-271 (2010)
2000 – 2009
- 2009
- [c17]André V. Fidalgo
Using test infrastructures for (remote) online evaluation of the sensitivity to SEUs of FPGAs. IOLTS 2009: 181 - 2008
- [j1]Manuel G. Gericota
Reliability and Availability in Reconfigurable Computing: A Basis for a Common Solution. IEEE Trans. Very Large Scale Integr. Syst. 16(11): 1545-1558 (2008) - [c16]André V. Fidalgo
A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures. SBCCI 2008: 22-27 - 2007
- [c15]Manuel G. Gericota
A Framework for Self-Healing Radiation-Tolerant Implementations on Reconfigurable FPGAs. DDECS 2007: 301-306 - [c14]Manuel G. Gericota
On-Line Self-Healing of Circuits Implemented on Reconfigurable FPGAs. IOLTS 2007: 217-222 - 2006
- [c13]Manuel G. Gericota
A New Approach to Assess Defragmentation Strategies in Dynamically Reconfigurable FPGAs. ARC 2006: 262-267 - [c12]Manuel G. Gericota
A Framework for Fault Tolerant Real Time Systems Based on Reconfigurable FPGAs. ETFA 2006: 131-138 - [c11]André V. Fidalgo
Using NEXUS compliant debuggers for real time fault injection on microprocessors. SBCCI 2006: 214-219 - 2005
- [c10]Manuel G. Gericota
A self-healing real-time system based on run-time self-reconfiguration. ETFA 2005 - 2003
- [c9]Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José M. Ferreira:
Run-Time Management of Logic Resources on Reconfigurable Systems. DATE 2003: 10974-10979 - 2002
- [c8]Manuel G. Gericota
A Novel Methodology for the Concurrent Test of Partial and Dynamically Reconfigurable SRAM-Based FPGAs. DATE 2002: 1126 - [c7]Manuel G. Gericota
On-line Defragmentation for Run-Time Partially Reconfigurable FPGAs. FPL 2002: 302-311 - [c6]Manuel G. Gericota
Active Replication: Towards a Truly SRAM-Based FPGA On-Line Concurrent Testing. IOLTW 2002: 165-169 - [c5]Manuel G. Gericota, Gustavo R. Alves:
Dynamic Replication: The Core of a Truly Non-Intrusive SRAM-based FPGA Structural Concurrent Test Methodology. LATW 2002: 70-75 - 2001
- [c4]Manuel G. Gericota
DRAFT: An On-Line Fault Detection Method for Dynamic and Partially Reconfigurable FPGAs. IOLTW 2001: 34-36 - [c3]Manuel G. Gericota, Gustavo R. Alves, José M. Ferreira:
Dynamically Rotate And Free for Test: The Path for FPGA Concurrent Test. LATW 2001: 180-185
1990 – 1999
- 1993
- [c2]Gustavo R. Alves
An HDL approach to board-level BIST. EURO-DAC 1993: 410-415 - [c1]José Manuel Martins Ferreira, Manuel G. Gericota
BIST for 1149.1-Compatible Boards: A Low-Cost and Maximum-Flexibility Solution. ITC 1993: 536-543
Coauthor Index
aka: Gustavo R. Alves
aka: José Manuel Martins Ferreira
aka: André Vaz Fidalgo
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