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Gauthaman Murali

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2020 – today

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2024
[c9]
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Lingjun Zhu, Jiawei Hu, Gauthaman Murali, Sung Kyu Lim:
Hetero-3D: Maximizing Performance and Power Delivery Benefits of Heterogeneous 3D ICs. ISLPED 2024: 1-6
2023
[j8]
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Gauthaman Murali, Anthony Agnesina, Sung Kyu Lim:
A PPA Study of Reinforced Placement Parameter Autotuning: Pseudo-3D vs. True-3D Placers. ACM Trans. Design Autom. Electr. Syst. 28(5): 75:1-75:22 (2023)
[j7]
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Gauthaman Murali, Aditya Iyer, Lingjun Zhu, Jianming Tong, Francisco Muñoz-Martínez, Srivatsa Rangachar Srinivasa, Tanay Karnik, Tushar Krishna, Sung Kyu Lim:
On Continuing DNN Accelerator Architecture Scaling Using Tightly Coupled Compute-on-Memory 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1603-1613 (2023)
[c8]
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Gauthaman Murali, Aditya Iyer, Navneeth Ravichandran, Sung Kyu Lim:
3DNN-Xplorer: A Machine Learning Framework for Design Space Exploration of Heterogeneous 3D DNN Accelerators. ICCAD 2023: 1-9
2022
[j6]
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Lingjun Zhu, Arjun Chaudhuri, Sanmitra Banerjee, Gauthaman Murali, Pruek Vanna-Iampikul, Krishnendu Chakrabarty, Sung Kyu Lim:
Design Automation and Test Solutions for Monolithic 3D ICs. ACM J. Emerg. Technol. Comput. Syst. 18(1): 21:1-21:49 (2022)
[j5]
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Yi-Chen Lu, Sai Pentapati, Lingjun Zhu, Gauthaman Murali, Kambiz Samadi, Sung Kyu Lim:
A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4575-4586 (2022)
[c7]
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Gauthaman Murali, Sandra Maria Shaji, Anthony Agnesina, Guojie Luo, Sung Kyu Lim:
ART-3D: Analytical 3D Placement with Reinforced Parameter Tuning for Monolithic 3D ICs. ISPD 2022: 97-104
2021
[j4]
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Gauthaman Murali, Xiaoyu Sun, Shimeng Yu, Sung Kyu Lim:
Heterogeneous Mixed-Signal Monolithic 3-D In-Memory Computing Using Resistive RAM. IEEE Trans. Very Large Scale Integr. Syst. 29(2): 386-396 (2021)
[j3]
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Gauthaman Murali, Heechun Park, Eric Qin, Hakki Mert Torun, Majid Ahadi Dolatsara, Madhavan Swaminathan, Tushar Krishna, Sung Kyu Lim:
Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems. IEEE Trans. Very Large Scale Integr. Syst. 29(4): 605-616 (2021)
[c6]
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Gauthaman Murali, Sung Kyu Lim:
Heterogeneous 3D ICs: Current Status and Future Directions for Physical Design Technologies. DATE 2021: 146-151
[c5]
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Sanmitra Banerjee, Arjun Chaudhuri, Jinwoo Kim, Gauthaman Murali, Mark Nelson, Sung Kyu Lim, Krishnendu Chakrabarty:
ParaMitE: Mitigating Parasitic CNFETs in the Presence of Unetched CNTs. ICCAD 2021: 1-9
2020
[j2]
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Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Jinwoo Kim, Gauthaman Murali, Edward Lee, Daehyun Kim, Sung Kyu Lim, Saibal Mukhopadhyay, Krishnendu Chakrabarty:
Advances in Design and Test of Monolithic 3-D ICs. IEEE Des. Test 37(4): 92-100 (2020)
[j1]
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Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim:
Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse. IEEE Trans. Very Large Scale Integr. Syst. 28(11): 2424-2437 (2020)
[c4]
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Jinwoo Kim, Gauthaman Murali, Pruek Vanna-Iampikul, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty, Saibal Mukhopadhyay, Sung Kyu Lim:
RTL-to-GDS Design Tools for Monolithic 3D ICs. ICCAD 2020: 126:1-126:8
[c3]
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  - conf/vlsi/CraftonSMKLR20
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Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury:
Breaking Barriers: Maximizing Array Utilization for Compute in-Memory Fabrics. VLSI-SOC 2020: 123-128
[c2]
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Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury:
Statistical Array Allocation and Partitioning for Compute In-Memory Fabrics. VLSI-SoC (Selected Papers) 2020: 323-341
[i1]
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  - journals/corr/abs-2008-06741
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Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury:
Breaking Barriers: Maximizing Array Utilization for Compute In-Memory Fabrics. CoRR abs/2008.06741 (2020)

2010 – 2019

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2019
[c1]
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Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim:
Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse. DAC 2019: 178

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