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Zehan Cui
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2010 – 2019
- 2016
- [c12]Zehan Cui, Tianyue Lu, Sally A. McKee, Mingyu Chen, Haiyang Pan, Yuan Ruan:
Twin-Load: Bridging the Gap between Conventional Direct-Attached and Buffer-on-Board Memory Systems. MEMSYS 2016: 164-176 - 2015
- [i3]Zehan Cui, Tianyue Lu, Haiyang Pan, Sally A. McKee, Mingyu Chen:
Twin-Load: Building a Scalable Memory System over the Non-Scalable Interface. CoRR abs/1505.03476 (2015) - [i2]Zhipeng Wei, Zehan Cui, Mingyu Chen:
Cracking Intel Sandy Bridge's Cache Hash Function. CoRR abs/1508.03767 (2015) - 2014
- [j3]Licheng Chen, Mingyu Chen, Yuan Ruan, Yongbing Huang, Zehan Cui, Tianyue Lu, Yungang Bao:
MIMS: Towards a Message Interface Based Memory System. J. Comput. Sci. Technol. 29(2): 255-272 (2014) - [j2]Lei Liu, Zehan Cui, Yong Li, Yungang Bao, Mingyu Chen, Chengyong Wu:
BPM/BPM+: Software-based dynamic memory partitioning mechanisms for mitigating DRAM bank-/channel-level interferences in multicore systems. ACM Trans. Archit. Code Optim. 11(1): 5:1-5:28 (2014) - [j1]Yongbing Huang, Licheng Chen, Zehan Cui, Yuan Ruan, Yungang Bao, Mingyu Chen, Ninghui Sun:
HMTT: A hybrid hardware/software tracing system for bridging the DRAM access trace's semantic gap. ACM Trans. Archit. Code Optim. 11(1): 7:1-7:25 (2014) - [c11]Zehan Cui, Licheng Chen, Yungang Bao, Mingyu Chen:
A Swap-based Cache Set Index Scheme to Leverage both Superpage and Page Coloring Optimizations. DAC 2014: 140:1-140:6 - [c10]Zehan Cui, Sally A. McKee, Zhongbin Zha, Yungang Bao, Mingyu Chen:
DTail: a flexible approach to DRAM refresh management. ICS 2014: 43-52 - [c9]Lei Liu, Yong Li, Zehan Cui, Yungang Bao, Mingyu Chen, Chengyong Wu:
Going vertical in memory management: Handling multiplicity by multi-policy. ISCA 2014: 169-180 - [c8]Licheng Chen, Zhipeng Wei, Zehan Cui, Mingyu Chen, Haiyang Pan, Yungang Bao:
CMD: classification-based memory deduplication through page access characteristics. VEE 2014: 65-76 - 2013
- [c7]Licheng Chen, Yanan Wang, Zehan Cui, Yongbing Huang, Yungang Bao, Mingyu Chen:
Scattered superpage: A case for bridging the gap between superpage and page coloring. ICCD 2013: 177-184 - [c6]Licheng Chen, Yongbing Huang, Yungang Bao, Guangming Tan, Zehan Cui:
A Study of Leveraging Memory Level Parallelism for DRAM System on Multi-core/Many-Core Architecture. TrustCom/ISPA/IUCC 2013: 1206-1215 - [i1]Licheng Chen, Tianyue Lu, Yanan Wang, Mingyu Chen, Yuan Ruan, Zehan Cui, Yongbing Huang, Mingyang Chen, Jiutian Zhang, Yungang Bao:
MIMS: Towards a Message Interface based Memory System. CoRR abs/1301.0051 (2013) - 2012
- [c5]Yongbing Huang, Zehan Cui, Licheng Chen, Wenli Zhang, Yungang Bao, Mingyu Chen:
HaLock: hardware-assisted lock contention detection in multithreaded applications. PACT 2012: 253-262 - [c4]Lei Liu, Zehan Cui, Mingjie Xing, Yungang Bao, Mingyu Chen, Chengyong Wu:
A software memory partition approach for eliminating bank-level interference in multicore systems. PACT 2012: 367-376 - [c3]Zehan Cui, Licheng Chen, Mingyu Chen, Yungang Bao, Yongbing Huang, Huiwei Lv:
Evaluation and Optimization of Breadth-First Search on NUMA Cluster. CLUSTER 2012: 438-448 - [c2]Licheng Chen, Zehan Cui, Yungang Bao, Mingyu Chen, Yongbing Huang, Guangming Tan:
A lightweight hybrid hardware/software approach for object-relative memory profiling. ISPASS 2012: 46-57 - 2011
- [c1]Zehan Cui, Yan Zhu, Yungang Bao, Mingyu Chen:
A fine-grained component-level power measurement method. IGCC 2011: 1-6
Coauthor Index
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