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Masoud Zamani
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2010 – 2019
- 2013
- [j1]Masoud Zamani, Hanieh Mirzaei, Mehdi Baradaran Tahoori:
ILP formulations for variation/defect-tolerant logic mapping on crossbar nano-architectures. ACM J. Emerg. Technol. Comput. Syst. 9(3): 21:1-21:21 (2013) - 2012
- [c12]Masoud Zamani, Mehdi Baradaran Tahoori:
Reliable logic mapping on Nano-PLA architectures. ACM Great Lakes Symposium on VLSI 2012: 107-110 - [c11]Masoud Zamani, Mehdi Baradaran Tahoori, Krishnendu Chakrabarty
:
Ping-pong test: Compact test vector generation for reversible circuits. VTS 2012: 164-169 - 2011
- [c10]Masoud Zamani, Mehdi Baradaran Tahoori:
Variation-aware logic mapping for crossbar nano-architectures. ASP-DAC 2011: 317-322 - [c9]Masoud Zamani, Hossein Pedram, Fabrizio Lombardi:
Templated-Based Asynchronous Design for Testable and Fail-Safe Operation. DFT 2011: 146-152 - [c8]Masoud Zamani, Mehdi Baradaran Tahoori:
Online Missing/Repeated Gate Faults Detection in Reversible Circuits. DFT 2011: 435-442 - [c7]Masoud Zamani, Navid Farazmand, Mehdi Baradaran Tahoori:
Fault Masking and Diagnosis in Reversible Circuits. ETS 2011: 69-74 - [c6]Masoud Zamani, Mehdi Baradaran Tahoori:
Variation-immune quasi delay-insensitive implementation on nano-crossbar arrays. ACM Great Lakes Symposium on VLSI 2011: 181-186 - [c5]Masoud Zamani, Mehdi Baradaran Tahoori:
Self-timed nano-PLA. NANOARCH 2011: 78-85 - 2010
- [c4]Navid Farazmand, Masoud Zamani, Mehdi Baradaran Tahoori:
Online Multiple Fault Detection in Reversible Circuits. DFT 2010: 429-437 - [c3]Masoud Zamani, Mehdi Baradaran Tahoori:
A transient error tolerant self-timed asynchronous architecture. ETS 2010: 88-93 - [c2]Navid Farazmand, Masoud Zamani, Mehdi Baradaran Tahoori:
Online fault testing of reversible logic using dual rail coding. IOLTS 2010: 204-205
2000 – 2009
- 2008
- [c1]Ali-Asghar Salehpour, Masoud Zamani, Amir-Mohammad Rahmani, Siamak Mohammadi
A novel test environment for template based QDI asynchronous circuits. ICECS 2008: 526-529
Coauthor Index
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