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Monica Magalhães Pereira
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2020 – today
- 2023
- [j5]Hiago Mayk G. de A. Rocha
, Antonio Carlos Schneider Beck, Márcio Eduardo Kreutz, Sílvia Maria Diniz Monteiro Maia, Monica Magalhães Pereira:
Using evolutionary metaheuristics to solve the mapping and routing problem in networks on chip. Des. Autom. Embed. Syst. 27(1-2): 51-83 (2023) - 2021
- [c24]Samuel da Silva Oliveira
Using Machine Learning to Estimate Latency and Delivered Packets in Hybrids NoCs. SBESC 2021: 1-7 - 2020
- [c23]Alba Sandyra Bezerra Lopes, Anne Magály de Paula Canuto, Monica Magalhães Pereira:
Regression Ensembles for Fast Design Space Exploration of Heterogeneous Hardware Designs. ICMLA 2020: 201-204 - [c22]Alba Sandyra Bezerra Lopes, Monica Magalhães Pereira:
A Machine Learning Approach to Accelerating DSE of Reconfigurable Accelerator Systems. SBCCI 2020: 1-6 - [c21]Raul Silveira Silva, Guilherme Korol, Michael Guilherme Jordan, Marcelo Brandalero, Michael Hübner, Monica Magalhães Pereira, Mateus Beck Rutzig, Antonio Carlos Schneider Beck:
A Management Technique for Concurrent Access to a Reconfigurable Accelerator. SBCCI 2020: 1-6 - [c20]Samuel da S. Oliveira
Mapping Wired Links in a Hybrid Wired-Wireless Network-on-Chip. SBESC 2020: 1-8 - [c19]Hiago Mayk G. de A. Rocha
A Routing based Genetic Algorithm for Task Mapping on MPSoC. SBESC 2020: 1-8
2010 – 2019
- 2019
- [j4]Ricardo S. Ferreira
A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design. Trans. High Perform. Embed. Archit. Compil. 5: 121-139 (2019) - [j3]Jefferson Silva
An investigation of latency prediction for NoC-based communication architectures using machine learning techniques. J. Supercomput. 75(11): 7573-7591 (2019) - [c18]Guilherme Korol, Michael Guilherme Jordan, Raul Silveira Silva, Monica Magalhães Pereira, Marcelo Brandalero, Mateus Beck Rutzig, Antonio Carlos Schneider Beck:
A Runtime Power-Aware Phase Predictor for CGRAs. ReConFig 2019: 1-8 - [c17]Gustavo Alves Bezerra
Generation of Application Specific Fault Tolerant Irregular NoC Topologies Using Tabu Search. SBESC 2019: 1-8 - [c16]Alba Sandyra Bezerra Lopes, Marcelo Brandalero, Antonio C. S. Beck, Monica Magalhães Pereira:
Generating Optimized Multicore Accelerator Architectures. SBESC 2019: 1-8 - [c15]Raul Silveira Silva, Patrícia Pontes Cruz, Márcio Eduardo Kreutz, Monica Magalhães Pereira:
Communication Latency Evaluation on a Software-Defined Network-on-Chip. SBESC 2019: 1-7 - 2018
- [c14]Augusto G. Erichsen
ISA-DTMR: Selective Protection in Configurable Heterogeneous Multicores. ARC 2018: 231-242 - 2016
- [j2]Ricardo S. Ferreira, Waldir Denver, Monica Magalhães Pereira, Stephan Wong, Carlos Arthur Lang Lisbôa, Luigi Carro:
A Dynamic Modulo Scheduling with Binary Translation: Loop optimization with software compatibility. J. Signal Process. Syst. 85(1): 45-66 (2016) - [c13]Alba Sandyra Bezerra Lopes, Eliselma Santos, Márcio Eduardo Kreutz, Monica Magalhães Pereira:
A Runtime Mapping Algorithm to Tolerate Permanent Faults in a CGRA. SBESC 2016: 63-70 - [c12]Jonathan Wanderley de Mesquita, Marcos Oliveira da Cruz, Monica Magalhães Pereira, Márcio Eduardo Kreutz:
Design Space Exploration Using UTNoCs and Genetic Algorithm. SBESC 2016: 198-202 - 2015
- [c11]Alba Sandyra Bezerra Lopes, Márcio Eduardo Kreutz, Monica Magalhães Pereira:
Enabling NoC Performance Improvement Using a Fault Tolerance Mechanism. SBESC 2015: 7-12 - 2014
- [c10]Ricardo S. Ferreira, Waldir Denver, Monica Magalhães Pereira, Jorge Quadros, Luigi Carro, Stephan Wong:
A run-time modulo scheduling by using a binary translation mechanism. ICSAMOS 2014: 75-82 - 2013
- [c9]Ricardo S. Ferreira, Vinicius Duarte, Waldir Meireles, Monica Magalhães Pereira, Luigi Carro, Stephan Wong:
A just-in-time modulo scheduling for virtual coarse-grained reconfigurable architectures. ICSAMOS 2013: 188-195 - 2011
- [j1]Monica Magalhães Pereira, Luigi Carro
Dynamic Reconfigurable Computing: The Alternative to Homogeneous Multicores under Massive Defect Rates. Int. J. Reconfigurable Comput. 2011: 452589:1-452589:17 (2011) - [c8]Monica Magalhães Pereira, Lars Braun, Michael Hübner, Jürgen Becker, Luigi Carro
Run-time resource instantiation for fault tolerance in FPGAs. AHS 2011: 88-95 - [c7]Ricardo S. Ferreira, Julio C. Goldner Vendramini, Lucas Mucida, Monica Magalhães Pereira, Luigi Carro
An FPGA-based heterogeneous coarse-grained dynamically reconfigurable architecture. CASES 2011: 195-204 - 2010
- [c6]Monica Magalhães Pereira, Luigi Carro:
Dynamic Reconfigurable Computing: the Alternative to Homogeneous Multicores under Massive Defect Rates. ReCoSoC 2010: 79-86
2000 – 2009
- 2009
- [c5]Monica Magalhães Pereira, Luigi Carro
Dynamically Adapted Low-Energy Fault Tolerant Processors. AHS 2009: 91-97 - [c4]Luigi Carro, Monica Magalhães Pereira:
Adaptive Processing Architectures for the Ultimate Scaling of the CMOS World. ERSA 2009: 91-97 - 2008
- [c3]Monica Magalhães Pereira, Sílvio R. F. de Araújo, Bruno Cruz de Oliveira, Ivan Saraiva Silva:
Using traditional loop unrolling to fit application on a new hybrid reconfigurable architecture. SAC 2008: 1552-1553 - 2007
- [c2]Monica Magalhães Pereira, Bruno Cruz de Oliveira, Ivan Saraiva Silva:
RoSA: a reconfigurable stream-based architecture. SBCCI 2007: 159-164 - 2006
- [c1]Gustavo Girão, Sílvio R. F. de Araújo, Monica Magalhães Pereira, Ivan Saraiva Silva:
Implementation of a HDTV transport stream multiplexer based on ITU-T H.222.0 recommendation. WebMedia 2006: 1-9
Coauthor Index
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