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Dipankar Saha
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2020 – today
- 2021
- [c10]Sudipta Mukherjee, Kasturi Saha, Dipankar Saha, Apurba Laha, Swaroop Ganguly:
Loss Reduction in a Grid-Connected Photovoltaic System Operated with P-&-O Algorithm based MPPT Control by introducing Diamond MOSFET. ISDCS 2021: 1-6 - [c9]Yuvam Bhateja
, Joshua Roy Palathinkal, Tamajeet Mandal, Pronay Roy, Dipankar Saha:
Modeling of Thermal Properties of Semiconducting Monolayer MoSe2 and WSe2. VDAT 2021: 1-6
2010 – 2019
- 2019
- [j2]Mausumi Sen
A Darbo fixed point theory approach towards the existence of a functional integral equation in a Banach algebra. Appl. Math. Comput. 358: 111-118 (2019) - 2018
- [c8]Swetapadma Sahoo, Nidhi Pandey, Dipankar Saha, Swaroop Ganguly:
Atomistic Analysis of Receptor Structure in Quantum Biomimetic Olfactory Sensor. IEEE SENSORS 2018: 1-4 - [c7]Richa Chakravarty, Dipankar Saha, Santanu Mahapatra:
New Asymmetric Atomistic Model for the Analysis of Phase-Engineered MoS2-Gold Top Contact. VLSID 2018: 139-142 - 2013
- [j1]Arvind Chandra Pandey
Assessment of surface and subsurface waterlogging, water level fluctuations, and lithological variations for evaluating groundwater resources in Ganga Plains. Int. J. Digit. Earth 6(3): 276-296 (2013) - [i2]Dipankar Saha, Subhramita Basak, Sagar Mukherjee, Chandan Kumar Sarkar:
A Low-Voltage, Low-Power 4-bit BCD Adder, designed using the Clock Gated Power Gating, and the DVT Scheme. CoRR abs/1309.7163 (2013) - [i1]Dipankar Saha, Subhramita Basak, Sagar Mukherjee, Sayan Chatterjee, Chandan Kumar Sarkar:
Implementation of the Cluster Based Tunable Sleep Transistor Cell Power Gating Technique for a 4x4 Multiplier Circuit. CoRR abs/1310.3203 (2013) - 2012
- [c6]Sagar Mukherjee, Dipankar Saha, Posiba Mostafa, Sayan Chatterjee, Chandan Kumar Sarkar:
A 4-bit Asynchronous Binary Search ADC for Low Power, High Speed Applications. ISED 2012: 28-32 - [c5]Subhramita Basak, Dipankar Saha, Sagar Mukherjee, Sayan Chatterjee, Chandan Kumar Sarkar:
Design and Analysis of a Robust, High Speed, Energy Efficient 18 Transistor 1-bit Full Adder Cell, Modified with the Concept of MVT Scheme. ISED 2012: 130-134 - [c4]Rituparna Dasgupta, Dipankar Saha, Jagannath Samanta
Implementation of a New Offset Generator Block for the Low-Voltage, Low-Power Self Biased Threshold Voltage Extractor Circuit. VDAT 2012: 156-165 - 2011
- [c3]Roshni Chandrashekhar, Manoj Mardithaya, P. Santhi Thilagam
SQL Injection Attack Mechanisms and Prevention Techniques. ADCONS 2011: 524-533
2000 – 2009
- 2009
- [c2]Rama Akkiraju, Tilak Mitra, Nilay Ghosh, Dipankar Saha, Usha Thulasiram, Soham Chakraborthy:
Toward the Development of Cross-Platform Business Applications via Model-Driven Transformations. SERVICES I 2009: 585-592 - 2008
- [c1]Rama Akkiraju, Tilak Mitra, Pankaj Dhoolia, Wei Zhao, Shiwa Fu, Manisha Bhandar, Nilay Ghosh, Dipankar Saha:
Toward the Development of Contextually Aware Business Applications via Model-Driven Transformations. ICWS 2008: 569-576
Coauthor Index
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