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Jing-Jou Tang
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2020 – today
- 2023
- [c23]Pei-Hua Chang, Chieh-Yu Hung, Su-Fen Cheng, Jing-Jou Tang, Chi-Wei Cheng:
An Exploration of Self-Regulation Learning Practices and Its Effectiveness with Kahoot! Incorporated into Electronics Teaching. TALE 2023: 1-6 - 2022
- [c22]Pei-Hua Chang, Su-Fen Cheng, Chi-Wei Cheng, Jing-Jou Tang, Ching-Biau Tzeng:
An Exploration of Instructional Design and Its Effectiveness of Using Cognitive Load Perspective into Electronics Experiment Course. TALE 2022: 415-422 - 2020
- [c21]B. V. P. Prasad, Jing-Jou Tang, Liang-Chi Dai, Ying-Chao Chen:
Conformance Test of Automotive CAN BUS Transceiver: Empirical Research of Industry Case. ICKII 2020: 1-5 - [c20]B. V. P. Prasad, Qing Yuan Huang, Jing-Jou Tang:
Development of a Prototype EV Autonomous Vehicle for Systematic Research. ICS 2020: 459-461
2010 – 2019
- 2019
- [c19]B. V. P. Prasad, Jing-Jou Tang, Sheng-Jhu Luo:
Design and Implementation of Data Collection and Driving Behaviour Analysis Based on SAE J1939. ISPACS 2019: 1-2 - 2018
- [c18]Liang-Bi Chen
, Ke-Yu Su, Yu-Ching Mo, Wan-Jung Chang, Wei-Wen Hu, Jing-Jou Tang, Chao-Tang Yu:
An Implementation of Deep Learning based IoV System for Traffic Accident Collisions Detection with an Emergency Alert Mechanism. ICCE-Berlin 2018: 1-2 - 2017
- [c17]Yuan-Hua Zhang, Sheng-Xiu Lin, Liang-Bi Chen
An implementation of an in-vehicle power line communication system. GCCE 2017: 1-2 - [c16]Hong-Yuan Li, Jing-Jou Tang, C. T. Yu, W. W. Hu, Wan-Jung Chang, D. H. Lee, Y. C. Chung:
A novel hardware architecture of CAN applications. ICCE 2017: 279-280 - 2016
- [j5]Liang-Bi Chen
WristEye: Wrist-Wearable Devices and a System for Supporting Elderly Computer Learners. IEEE Access 4: 1454-1463 (2016) - [j4]Wan-Jung Chang, Hong-Yuan Li, Jing-Jou Tang:
A Flexible Cooperation Scheme for Mitigating the Effect of Selfish Nodes over MANETs. Ad Hoc Sens. Wirel. Networks 33(1-4): 121-151 (2016) - [c15]Hong-Yuan Li, Liang-Bi Chen
Design and development of an extensible multi-protocol automotive gateway. ICCE-TW 2016: 1-2 - [c14]Liang-Bi Chen
An adaptive residential energy management scheme in the smart home. ICCE 2016: 257-258 - [c13]Liang-Bi Chen
An efficient fault tolerance path finding algorithm for improving the robustness of multichannel wireless mesh networks. ICCE 2016: 524-525 - 2015
- [c12]Liang-Bi Chen
An intelligent vehicular telematics platform for vehicle driving safety supporting system. ICCVE 2015: 210-211 - 2014
- [c11]Wei Ting Lee, Yung Chi Chung, Chu Yu Chen, Jing-Jou Tang, Chung Shun Yang:
Prediction of the BCI results For CAN bus ECU using incident wave excitation method. ICCE-TW 2014: 175-176 - 2010
- [c10]Lih-Shyang Chen, Young-Jinn Lay, Lian-Yong Lin, Jing-Jou Tang, Wen-Lin Cheng, Yu-Jen Lin:
The 3D Display and Analysis of the Pattern of Photolithography. ICCCI (1) 2010: 117-127
2000 – 2009
- 2006
- [c9]Tzyy-Kuen Tien, Jing-Jou Tang, Kuan-Jou Chen:
A new high speed dynamic PLA. ISCAS 2006 - 2005
- [c8]Li-Chun Tien, Jing-Jou Tang, Mi-Chang Chang:
An Automatic Layout Generator for I/O Cells. IWSOC 2005: 295-300 - 2000
- [c7]Jing-Jou Tang, Ping-Tsung Wang:
A efficient placement and global routing algorithm for hierarchical FPGAs. ISCAS 2000: 729-732
1990 – 1999
- 1999
- [j3]Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang:
BIFEST: a built-in intermediate fault effect sensing and test generation system for CMOS bridging faults. ACM Trans. Design Autom. Electr. Syst. 4(2): 194-218 (1999) - [c6]Jing-Jou Tang:
An Accurate Logic Threshold Voltages Determination Model for CMOS Gates to Facilitate Test Generation and Fault Simulation. Asian Test Symposium 1999: 81- - 1998
- [j2]Jing-Jou Tang, Kuen-Jong Lee, Bin-Da Liu:
A graph representation for programmable logic arrays to facilitate testing and logic design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(10): 1030-1043 (1998) - [c5]Kuen-Jong Lee, Jing-Jou Tang, Wern-Yih Duh:
On the Determination of Threshold Voltages for CMOS Gates to Facilitate Test Pattern Generation and Fault Simulation. Asian Test Symposium 1998: 113-118 - 1996
- [c4]Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang, Cheng-Liang Tsai:
Combination Of Automatic Test Pattern Generation And Built-In Intermediate Voltage Sensing For Detecting CMOS Bridging Faults. Asian Test Symposium 1996: 100- - [c3]Kuen-Jong Lee, Jing-Jou Tang:
Two Modeling Techniques For CMOS Circuits To Enhance Test Generation And Fault Simulation For Bridging Faults. Asian Test Symposium 1996: 165-171 - 1995
- [j1]Jing-Jou Tang, Kuen-Jong Lee, Bin-Da Liu:
A practical current sensing technique for IDDQ testing. IEEE Trans. Very Large Scale Integr. Syst. 3(2): 302-310 (1995) - [c2]Jing-Jou Tang, Kuen-Jong Lee, Bin-Da Liu:
Built-in intermediate voltage testing for CMOS circuits. ED&TC 1995: 372-377 - [c1]Jing-Jou Tang, Bin-Da Liu, Kuen-Jong Lee:
An IDDQ Fault Model to Facilitate the Design of Built-In Current Sensor (BICSs). ISCAS 1995: 393-396
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