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Yingke Xie
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2020 – today
- 2023
- [c11]Xiaogang Cao, Fenghua Li, Kui Geng, Yingke Xie, Wenlong Kou:
On-Demand Allocation of Cryptographic Computing Resource with Load Prediction. ICICS 2023: 179-196 - 2022
- [c10]Siyuan Leng, Yingke Xie, Yifan Zhang, Yunchuan Guo, Liang Fang, Fenghua Li:
DICOF: A Distributed and Collaborative Framework for Hybrid DDoS Attack Detection. ISCC 2022: 1-7
2010 – 2019
- 2014
- [j2]Layong Luo, Gaogang Xie, Yingke Xie, Laurent Mathy, Kavé Salamatian
:
A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates. IEEE/ACM Trans. Netw. 22(3): 957-969 (2014) - 2013
- [c9]Layong Luo, Gaogang Xie, Kavé Salamatian
A trie merging approach with incremental updates for virtual routers. INFOCOM 2013: 1222-1230 - 2012
- [c8]Layong Luo, Gaogang Xie, Steve Uhlig
Towards TCAM-based scalable virtual routers. CoNEXT 2012: 73-84 - [c7]Fuxing Zhang, Yingke Xie, Junjie Liu, Layong Luo, Qingsong Ning, Xiaolong Wu:
ITester: A FPGA based high performance traffic replay tool. FPL 2012: 699-702 - [c6]Layong Luo, Gaogang Xie, Yingke Xie, Laurent Mathy, Kavé Salamatian
A hybrid IP lookup architecture with fast updates. INFOCOM 2012: 2435-2443 - [c5]Junjie Liu, Yingke Xie, Gaogang Xie, Layong Luo, Fuxing Zhang, Xiaolong Wu, Qingsong Ning, Hongtao Guan:
Building a Flexible and Scalable Virtual Hardware Data Plane. Networking (1) 2012: 205-216 - 2011
- [j1]Gaogang Xie, Peng He, Hongtao Guan, Zhenyu Li, Yingke Xie, Layong Luo, Jianhua Zhang, Yonggong Wang, Kavé Salamatian
PEARL: a programmable virtual router platform. IEEE Commun. Mag. 49(7): 71-77 (2011)
2000 – 2009
- 2009
- [c4]Chao Zhu, Yingke Xie, Mingshu Wang, Jizhong Han, Chengde Han:
Co-match: fast and efficient packet inspection for multiple flows. ANCS 2009: 199-208 - [c3]Jiandong Wang, Yingke Xie, Chao Zhu, Zili Zhao, Chengde Han:
An Embedded Load Balancing System for High Speed OC192 Networks. ICESS 2009: 587-592 - 2008
- [c2]Jianghong Huang, Yuxiang Li, Lisheng Zhang, Yingke Xie, Chengde Han:
A novel high-capability control-flow checking technique for RISC architectures. ICESS 2008: 258-263 - 2005
- [c1]Chu Chao, Qin Zhang, Yingke Xie, Chengde Han:
Design of a high performance FFT processor based on FPGA. ASP-DAC 2005: 920-923
Coauthor Index
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