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14th LASCAS 2023: Quito, Ecuador
- 14th IEEE Latin America Symposium on Circuits and System, LASCAS 2023, Quito, Ecuador, February 28 - March 3, 2023. IEEE 2023, ISBN 978-1-6654-5705-7
- Tailize C. De-Oliveira, Raul P. De Oliveira, Alessandro Gonçalves Girardi, Paulo César Comassetto de Aguirre, Lucas Compassi Severo
:
An RF-EH Employing Controlled-Impedance Matching for Ultra-Low Voltage Batteryless Devices. 1-4 - Béatrice Guénégo, Caroline Lelandais-Perrault, Emilie Avignon-Meseldzija, Gérard Sou, Philippe Bénabès:
Design of an ECG front-end considering ST segment distortion. 1-4 - Luis Barón, Robert Urbina, Manuel Pérez, Carlos-Ivan Paez-Rueda, Arturo Fajardo:
A low-complexity experimental characterization of the neodymium magnet grade. 1-4 - El-hadi Zazoua, Wessam Ajib, Mounir Boukadoum:
Deep Learning-Based Receiver Energy Prediction in Energy Harvesting Wireless Sensor Network. 1-5 - Soumya Shatakshi Panda, Bhaskar Choubey:
A Compact Analogue Counter for Single Photon Imagers. 1-4 - Abhilash Reddy Yedala, Sankaran Aniruddhan:
A Self Oscillating Current-Reuse Image Reject Mixer for Ultra Low Power Receivers. 1-4 - Ronald H. G. Chacón
A Radiation Hardened Smart Power Switch Based on SOI Technology. 1-4 - Poliana A. C. Oliveira, Renan A. Marks, João V. C. Teixeira, Marcos V. Guterres, Omar P. Vilela Neto:
DNAr-Analog: A Library With a Multiplexer to Easily Design, Program, and Simulate Dsd Analog Circuits. 1-4 - Ricardo Ascázubi, F. Rogelio Palomo, Victoria Navarrete-Larive, José Manuel Quesada, Miguel Antonio Cortes-Giraldo, Jose Antonio Pavón-Rodriguez:
Neutron Irradiation of Si-PIN Diodes and Laser Injection Equivalence. 1-4 - Sofía Boselli, Romina Gaudio, María Pía Grilli, Fernando Silveira, Mariana Siniscalchi:
Thermal Energy Harvesting to Power a Battery-Less Node of a Wireless Sensor Network. 1-4 - Noam Shalom, Itamar Levi
Exploring Multi-Parameter Optimization of Automated HLS Tools and the Difficulty of Setting Complex Constraints. 1-4 - Elias de Almeida Ramos, Ricardo Reis:
Using Lyapunov Exponents to Estimate Sensitivity to Process Variability. 1-4 - Santiago S. Pérez, Alessandro Bedoya, Luis-Miguel Prócel
Performance Benchmarking of FinFET- and TFET-Based STT-MRAM Bitcells Operating at Ultra-Low Voltages. 1-4 - Jiovana Sousa Gomes, Tulio Pereira Bitencourt
Analysis of AV1 Arithmetic Decoder Design Space with a Novel Multi-Boolean Approach. 1-4 - Ricardo Ascázubi, Bahar Ajdari, Curtis Shirota:
Accelerated Hot-Carrier Aging Based on Ultrafast Laser for CMOS Technologies. 1-3 - Andrés Seré, Leonardo Barboni, Sylvain Bourdel, Fernando Silveira:
Active inductors modelling and trade-offs reexamined. 1-4 - Daniel M. Barrera Leguizamón, Robert Urbina, Carlos Páez, Arturo Fajardo, Gabriel Perilla:
On the Bode Diagram Plot of Switched Converters Using MATLAB Simulink - a Tutorial Approach. 1-4 - Oscar D. Montoya, W. Gil-Gonzalez, Federico Martin Serra, Cristian H. De Angelo, Jesús C. Hernández
Extended Feedback Linearization Control for Voltage Regulation in a Buck Converter with an Unknown Resistive Load. 1-4 - Nadia Nedjah, Sérgio de Souza Raposo, Luiza de Macedo Mourelle:
Concise Memory Organization for a Customizable Hardware Design of a Quantum Coprocessor. 1-4 - Ícaro Siqueira, Guilherme Corrêa, Mateus Grellert
Complexity and Coding Efficiency Assessment of AOMedia Video 1. 1-4 - Luis Felipe Machado Dutra
A Fast Cold-Start Integrated System for Ultra-Low Voltage SC Energy-Harvesting Circuits. 1-4 - Mateus Bernardino Moreira, Hervé Lapuyade, François Rivet, Yann Deval:
A Wide-Band High-Speed Sample and Hold in 0.35µm CMOS Technology. 1-4 - Noam Roknian
Overview of Cryogenic Operation in Nanoscale Technology Nodes. 1-4 - Jorge Marin, Ioannis Vourkas, Christian A. Rojas, Joel Gak:
Compact Time-Based Sensor-to-Digital Converters in Skywater 130nm Open-Source Technology. 1-4 - Sai Karthik Nandigama, Prashanth H. C.
Design and Evaluation of Inexact Computation based Systolic Array for Convolution. 1-4 - Lennart M. Reimann
Quantitative Information Flow for Hardware: Advancing the Attack Landscape. 1-4 - Eduardo Holguin, Luis-Miguel Prócel
Analysis and Design of a Self-Powered VEH System Based on ULP Comparator. 1-4 - Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha
Design-oriented model for short-channel MOS transistors based on inversion charge. 1-4 - Lucas Martins M. De Almeida, Bruno Sanches, Wilhelmus Adrianus Maria Van Noije:
High-Speed Sampler for UWB Breast Cancer Detection System. 1-4 - Jorge Luis González Rios
Stacked-Cascode Current Steering Architecture for Gallium Nitride Variable-Gain LNAs. 1-4 - Sabi Y. M. Bandiri, Souleymane Diakite, Max Frejus O. Sanya
Minimizing Power Consumption Through Brute Force Algorithm in Elastic Optical Network. 1-4 - Federico Martin Serra, W. Gil-Gonzalez, Oscar D. Montoya, Jesús C. Hernández
Voltage Regulation in a Buck Converter for an Unknown CPL: An Extended Feedback Control Design. 1-4 - Natalia Martínez, Matías R. Miguez
Self-Calibrating Circuit for Implantable Current Stimulators. 1-4 - Keyvan Farhang Razi, Alexandre Schmid:
Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical Devices. 1-4 - Morgana M. A. da Rosa
An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units. 1-4 - Ioannis K. Chatzipaschalis
Parkinson's Treatment Emulation Using Asynchronous Cellular Neural Networks. 1-4 - Renira Soares, Matheus Isquierdo, Felipe Sampaio, Amir Rahmani, Nikil D. Dutt, Guilherme Corrêa, Daniel Palomino, Bruno Zatt:
Error Resilience Evaluation of Approximate Storage in the Motion Compensation of VVC Decoders. 1-4 - Esteban Garzón
STT-MRAM Technology For Energy-Efficient Cryogenic Memory Applications. 1-4 - Avik Bhatnagar, Pratyush Nandi
Design and evaluation of CNN hardware accelerator designs for in-seat passenger anomaly detection. 1-4 - Duarte Lopes de Oliveira, Marcus H. Victor
Design of Quasi Delay Insensitive Combinational Circuits Based on Optimized DIMS. 1-4 - Soner Seçkiner, Selçuk Köse:
Security Implications of Decoupling Capacitors on Leakage Reduction in Hardware Masking. 1-4 - Bruna Garcia
Multi-Size Inverse DCT-II Hardware Design for the VVC Decoder. 1-4 - Marcello M. Muñoz, Denis Maass, Murilo R. Perleberg
Hardware Design for the Affine Motion Compensation of the VVC Standard. 1-4 - Richard Panek, Jakub Lojda:
The Fault-tolerant Single-FPGA Systems with a Self-repair Reconfiguration Controller. 1-4 - Robson Domanski, William Kolodziejski, Wagner Penny
High-Throughput and Multiplierless Hardware Design for the AV1 Fractional Motion Estimation. 1-4 - German Fierro, Fernando Silveira:
Pico-Ampere Current Biasing Platform for on-chip Tuning of Analog Blocks. 1-4 - Marie Peyrard, Gilles Jacquemod, Nicolas Froidevaux, Mélanie Moign:
Novel measurement method to estimate the main resonance of a Power Distribution Network. 1-4 - Vinicius A. Borges, Murilo R. Perleberg
Efficient Architecture for VVC Angular Intra Prediction based on a Hardware-Friendly Heuristic. 1-4
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