default search action
ICTA 2022: Xi'an, China
- 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022, Xi'an, China, October 28-30, 2022. IEEE 2022, ISBN 978-1-6654-9269-0
- Yukang Huang
, Dong Jiang, Yongkui Yang, Enyi Yao:
A Fully-Connected and Area-Efficient Ising Model Annealing Accelerator for Combinatorial Optimization Problems. 1-2 - Yunqi Yang, Ming Zhong, Qianli Ma, Ziyi Lin, Leliang Li, Guike Li, Liyuan Liu, Jian Liu, Nanjian Wu, Haikun Jia, Xinghui Liu, Nan Qi:
A 56Gb/s De-serializer with PAM-4 CDR for Chiplet Optical-I/O. 1-2 - Jiawei Fu, Pengcheng Wu, Hao Cai:
A High Reliability Sensing Amplifier for Hybrid MTJ/CMOS Circuits. 1-2 - Ying Yu, Xufeng Liao, Lianxi Liu:
A Fast Sampling Open-circuit Voltage Algorithm for Piezoelectric Energy Harvesting. 1-2 - Kaikai Wu
A passive balancing algorithm for multi-cells. 1-2 - Yucheng Jiang
Efficient AVS3 Intra Prediction Hardware Design for Real-time Applications. 1-2 - Weiliang Chen, Zhaoshi Li, Leibo Liu, Shaojun Wei:
Dynamically Reconfigurable Memory Address Mapping for General-Purpose Graphics Processing Unit. 1-2 - Haoqing Xu
Prediction of Key Metrics of Stacked Nanosheet nFETs using Genetic Algorithm-based Neural Networks. 3-4 - Nianquan Ran, Jia Li, Shuaizhe Ma, Yuye Yang
Optical Receiver Front-End for 50G PON in 40nm CMOS. 5-6 - Qingzhe Zhang, Keping Wang:
A 77-101GHz 6-Bit Vector-Modulated Phase Shifter with Low RMS Error in 65nm SOI CMOS. 9-10 - Tian Feng, Dengquan Li, Jiale Ding, Shubin Liu, Yi Shen, Zhangming Zhu:
A Wideband High-linearity Input Buffer Based on Cascade Complementary Source Follower. 13-14 - Ke Han, Daokun Li:
Low-Latency FPGA Design and Implementation of Hermitian Matrix Inversion Based on Partitioned Systolic Array for Massive MIMO. 15-16 - Hao Yang, Bin Yan, Jianjun Sur, Jian Pang, Guanavao Li, Ouvana Keqing, Shuaiana Zhang:
Accurate 3DIC thermal simulation for BEOL influence study. 17-19 - Haiyang Yu, C. R. Kao:
Formation Mechanism of high Ni content (Cu, Ni)6Sn5 in Cu/Sn/Ni microbump for solid state aging. 20-21 - Pengfei Wu, Zheng Wang, Zhiming Pan, Weilun Wang:
LIPFD-NPU: Low-overhead Instruction-driven Permanent Fault Detection for Neural Processing Unit. 22-23 - Kenie Xie, Pena Guo, Fei Chen, Binglu Chen, Xiaotong Fang, Jixuan Wu, Xuepeng Zhan, Jiezhi Chen:
Large Suppression to Lateral Charge Migration (LCM) Related Error Bits in Charge-Trap TLC 3D NAND Flash. 24-25 - Qin Tian, Dixian Zhao:
A Q-Band Low-Noise Amplifier in 40-nm CMOS for Q/V-band satellite communications. 26-27 - Hengzhi Wan, Dixian Zhao:
A V-band Power Amplifier for Satellite Communications in 40-nm CMOS. 28-29 - Hao Lu
First Demonstration of High PAE Performance Using InGaN Channel HEMT for 5G RF Applications. 30-31 - Zheng Li, Zixin Chen, Qiaoyu Wang, Jian Pang, Atsushi Shirane, Kenichi Okada:
A 41-GHz 19.4-dBm PSATCMOS Doherty Power Amplifier for 5G NR Applications. 32-33 - Renwei Chen, Yifei Zhang, Chenchang Zhan:
A 120nW, 121 kHz, -20~100°C CMOS Relaxation Oscillator with Digital Current Comparator and On-Chip Voltage and Current Reference. 34-35 - Mingkang Zhang, Zihao Zhu, Yueduo Liu, Zehao Zhang, Rongxin Bao, Jiahui Lin, Haovu Zhuang, Jiaxin Liu, Xiong Zhou, Shiheng Yang, Qiang Li:
A 4.2-to-5.6 GHz Transformer-Based PMOS-only Stacked-gm VCO in 28-nm CMOS. 36-37 - Jiahao Hu, Zhongxian Huang, Baoxing Duan, Qing Li, Ziqi Song, Dian He:
A Multiplying Delay-Locked Loop design with low jitter and high linearity. 38-39 - Qiushi Kang, Ge Li, Fanfan Niu, Chenxi Wang:
Cooperative surface-activation strategy for low-temperature Cu/SiO2 hybrid bonding. 40-41 - Yuhang Xie, Xufeng Liao, Xincai Liu, Lianxi Liu:
A DLL-Based Offset Calibration Loop Technology for Wake-Up Receivers. 42-43 - Weiyi Zhang
An Efficient FPGA Design for Fixed-point Exponential Calculation. 44-45 - Jialong Xue, Tenghao Zou, Hao Xu, Tingting Han, Mi Tian, Weiqiang Zhu, Zhijian Li, Na Yan:
A 6-18GHz Low-Noise Amplifier Using Noise Canceling Technique in 130-nm CMOS PD-SOI. 46-47 - Qiao Shen, Renyuan Zhang, Hao Zhang, Hao Cai, Bo Liu, Jian Xiao:
A CGP-based Efficient Approximate Multiplier with Error Compensation. 48-49 - Yuqing Fang, Qingxuan Li
Photon-Memristive Device for Neuromorphic Computing. 50-51 - Cece Huang, Yuanfu Zhao, Yafei Ji, Xin Yang, Tieliang Zhang, Weixin Gai:
An Input Buffer with 85dB SFDR for High-Speed Pipeline ADC. 52-53 - Haitao He, Changhao Luo, Junchen Dong, Yudi Zhao, Min Miao, Kai Zhao:
TSV Defects Classification with Machine Learning Approaches. 54-55 - Yifan Song, Shunpeng Zhao, Song Chen, Yi Kang:
SAUST: A Scheme for Acceleration of Unstructured Sparse Transformer. 56-57 - Haoyang Li, Yuyang Fu, Tianqing Wan, Yifan Lu, Ling Yang, Yi Li:
Improve the Robustness of Diffusive Memristor based True Random Number Generator via Voltage-to-Time Transformation. 58-59 - Zhiqiang Luo, Peng Wang, Fule Li, Chun Zhang, Zhihua Wang:
A statistics-based background capacitor mismatch calibration algorithm for SAR ADC. 60-61 - Cona Shi, Sihao Chen, Haibina Wana, Zhenaaina Zhona, Ping Li, Junxian He, Tengxiao Wang, Jianyi Yu, Min Tian:
TEDOP: A Tiny Event-Driven Neural Network Hardware Core Enabling On-Chip Spike-Driven Synaptic Plasticity. 62-63 - Yongchao Zhang, Zhuoqi Guo, Zhongming Xue, Zhuoneng Li, Xihao Liu, Shangzhou Zhao, Dexuan Lv, Mengqi Duan, Li Geng:
A 92.7% Peak Efficiency 48/1V DSD Power Converter with 102mV Droop and 1.6µs Settling Time for a 1A/10ns Load Transient. 64-65 - Lanxiang Xiao, Lei Chen, Fengwei An:
A 14.39ppm/kPa Stress Sensor with Low Temperature-drift and High Linearity for turbulence Stress. 66-67 - Shangzhou Zhao, Zhongming Xue, Yuhao Xiong, Zhuoneng Li, Xihao Liu, Yongchao Zhang, Zhuoqi Guo, Li Geng:
A 30W and 95% Efficiency Class-E Wireless Power Transfer Transmitter with Vector Algorithm Control. 68-69 - Yu-ang Wu, Mingyang Zhou, Hao Cai:
A Novel Segmented Temperature Monitor for Adaptive MRAM. 70-71 - Jiahao Zhao, Xuansheng Ji, Su Han, Ziwei Wang, Woogeun Rhee, Zhihua Wang:
A 0.7-2.5GHz NB-loT/GNSS/BLE Hybrid PLL with PA Pulling Mitigation and Out-of-Band Phase Noise Reduction. 74-75 - Xuecheng Cui, Dong Liu, Jifang Cao, Xiao Yu, Bing Chen:
A High-Density Large-Ratio Fuse Based Oxide Devices for One-time-programmable Memory Applications. 76-77 - Binwei Yang, Renwei Chen, Chenchang Zhan:
A 210nA Quiescent Current Bandgap Reference with 5mA Load Capability Using Shared Error Amplifier. 78-79 - Xiaoqiang Tang, Jialin Cai:
Implementation of Polynomial Fitted Poly-Harmonic Distortion Model with Frequency Defined Device. 80-81 - Bowen Zhu:
Dynamic Sensor Arrays Based on Solution-Processed Metal Oxide Semiconductor Thin-Film Transistors. 82-83 - Huabing Liao, Haikun Jia, Xiangrong Huang, Bao Shi, Wei Deng, Baoyong Chi, Zhihua Wang:
A 22.8 GHz to 32.8 GHz Compact Power Amplifier with a 15 dBm Output P1dB and 36.5% Peak PAE in 65-nm CMOS. 84-85 - Xuanchi Yu, Yan Chen, Gaofena Jin, Fei Feng, Xun Luo, Xiang Gao:
A Fully Synthesizable Injection Locked PLL with Dual-DCO Frequency Tracking in 55nm CMOS. 86-87 - Ruimin Zhu, Zeyang Xu, Yuhao Huang, Shanlin Xiao, Zhiyi Yu:
DFT Architecture for Click-Based Bundled-Data Asynchronous Circuits. 88-89 - Xiaoyun Tian, Zhong-Jian Bian, Hao Cai:
Towards Near LLC Speed STT-MRAM Sensing Using Reconfigurable Clock Trimming. 90-91 - Lei Huang, Huanpeng Wang, Qingzhi Wu, Shuman Mao, Yuehang Xu:
Characterization and Modeling of Trapping Effects in GaAs Enhanced HEMT under High Input Dynamic Range. 92-93 - Yujie Liu, Zhilong Xiao, Shiquan Zhu, Huanpeng Wang, Shuman Mao, Qingzhi Wu, Ruimin Xu, Bo Yan, Yuehang Xu:
A Broadband 20W GaN High Power Amplifier for Ku-band satellite communication. 94-95 - Sheng Zuo, Junjie Zhuang, Yao Liu, Mingyu Wang, Zhiyi Yu:
Hardware Based RISC-V Instruction Set Randomization. 96-97 - Haitao Ge, Weiwei Shan, Yicheng Lu, Jun Yang:
A 28nm, 4.69TOPS/W Training, 2.34µJ/lmage Inference, on-chip Training Accelerator with Inference-compatible Back Propagation. 98-99 - Chi Chen, Kuan Hu, Weilin Luo, Kang Yin, Ruiyuan Kang, Ying Zhao, Fei Yang:
A 20W Ka-Band Dual-Port Power Amplifier for Communication Satellites. 100-101 - Kaize Zhou, Dejian Li, Chongfei Shen, Yuxuan Du, Zhuo Chen, Weiwei Shan:
A Voltage Error Quantizer For Digital Low Dropout Regulators With Fast Transient Response and Low Steady-State Error. 102-103 - Zhengzhe Jia
A 200-Gb/s PAM-4 Feedforward Linear Equalizer with Multiple-Peaking and Fixed Maximum Peaking Frequencies in 130nm SiGe BiCMOS. 104-105 - Luhua Lin, Bowen Wang
An Analog-Assisted Digital LDO with 0.37mV Output Ripple and 5500x Load Current Range in 180nm CMOS. 106-107 - Yifan Yao, Chuqi Chen, Chenchang Zhan:
A 2.06μW/MHz, 5.05-MHz, -40-125°C, 22ppm/°C Relaxation Oscillatior with Single Comparator Control. 108-109 - Shuyue Fang, Jinrui Hu, Haigang Feng, Xinpeng Xing, Han Wang, Lei Yang:
A 4 to 5GHz Digitally Controlled Ring Oscillator with 100kHz Resolution using Noise Cancellation Technology in 40nm CMOS. 110-111 - Wenhui Liang, Jiarui Xu, Yuansheng Zhao, Zixuan Shen, Guoyi Yu, Yuhui He, Chao Wang:
An IMPLY-based Memristive Multiplier for Computing-in-Memory Systems with Weight-Stationary CNN Acceleration. 112-113 - Pengfei Wang, Minhan Mi, Sirui An, Xiang Du, Xiaohua Ma, Yue Hao:
A Novel Concept of using Double Threshold Voltage Coupling to Improve the linearity of AlGaN/GaN HEMTs for millimeter-wave applications. 114-115 - Zhicheng Li, Zhulu Song, Zhaojin Wang
Photoresponses and Memory Effects in Optoelectronic Synaptic Devices Based on CdSe Quantum Dots and Poly(3-hexylthiophene). 116-118 - Tianqi Xu, Shumeng Li, Fukun Su, Xian Tang:
A Current Domain Computing-in-Memory SRAM Macro with Hybrid IAF-SAR ADC for Signal Margin Enhancement. 119-120 - Jinrui Hu, Shuyue Fang, Haigang Feng, Xinpeng Xing, Han Wang, Lei Yang:
A Low Frequency Drift LC-DCO with Wide Temperature Range. 121-122 - Heng Liu, Dongxu Li, Xian Tang:
A High PSR and Fast Transient Response Output-Capacitorless LDO using Gm-Boosting and Capacitive Bulk-Driven Feed-Forward Technique in 22nm CMOS. 123-124 - Weiyi Zhang
ROPY-SLAM: a Heterogeneous CPU-FPGA System for Simultaneous Localization and Mapping. 125-126 - Zhuoneng Li, Zhonamina Xue, Chenalona Liang, Yongchao Zhang, Mengqi Duan, Shangzhou Zhao, Xihao Liu, Zhuoqi Guo, Li Geng:
A Single-input Dual-output Three-level Buck Converter for SoC Applications. 127-128 - Zhehan Wang, Dingxuan Kang, Jiayi Chen, Xiao Xu, Xu Jing, Li Tao:
Strain-regulated flexible molecular sensors enabled by 2D PtTe2. 131-132 - Ziyang Chen, Miaocheng Zhang, Zixuan Ding, Aoze Han, Xinavu Chen, Xinpeng Wang, Lei Wang, Hao Zhang, Yi Tong:
BaFe12O19 based Ferroelectric Memristor for Applications of True Random Number Generator. 133-134 - Yu Wang, Yi Liu, Jiayu Bao, Yu Yan, Ertao Hu, Xiang Wan, Rongqing Xu, Hao Zhang, Yi Tong:
Memristor-based Digital Circuits for Realizing the Pavlov's Associative Neural Network. 135-136 - Giovanni Gugliandolo, Xiue Bao, Haoyun Yuan, Jinkai Li, Junchena Bao, Giovanni Crupi, Nicola Donato:
A Split-Ring Resonator with Interdigitated Electrodes Aimed at the Dielectric Characterization of Liquid Mixtures (Invited Paper). 137-141 - Chenyi Wang
Two-bit multi-level spin orbit torque MRAM with the fully one-step write operation. 142-143 - Huafeng Ye, Huipeng Deng, Jian Wang, Mingyu Wang, Zhiyi Yu:
3D-NWA: A Nested-Winograd Accelerator for 3D CNNs. 143-144 - Peng Chen
Long Short-Term Memory Networks for Behavioral Modeling of A GaN Sequential Power Amplifier. 146-147 - Lingyun Liu, Chenglong Liang, Zhuoqi Guo, Zhongming Xue, Li Geng:
A Cap-Less High PSR and Low Output Noise Low-Dropout Regulator for Cryogenic Applications. 148-149 - Dengfeng Wanq, Zhi Li, Chengjun Chang, Weifeng He, Yanan Sun:
All-Digital Full-Precision In-SRAM Computing with Reduction Tree for Energy-Efficient MAC Operations. 150-151 - Jiacong Ke
A Compact 60 GHz LNA with 22.7-dB Gain and 4.4-dB NF in 40nm CMOS. 152-153 - Jinyu Xie, Xiaojun Bi:
A Fully-integrated 110-GHz Wideband Direct-detection Imaging Unit MMIC Integrating Balanced Power Detector and Log-periodic Antenna. 154-155 - Zhiyong Xiong, Dongfang Pan, Guolong Li, Lin Cheng:
A 250Mbps 100kV/µs CMTI On-Chip Double-Isolated Transformer-Based Digital Isolator. 156-157 - Hailong Wu, Jindong Li, Xiang Chen:
Implementation of CNN Heterogeneous Scheme Based on Domestic FPGA with RISC-V Soft Core CPU. 158-159 - Xuanhao Zhang, Haige Wu, Renyuan Zhang, Zihang Xu, Hao Zhang, Bo Liu, Hao Cai:
A TWN Inspired Speaker Verification Processor with Hardware-friendly Weight Quantization. 160-161 - Xinjie Feng, Yongzhen Chen, Youzhi Gu, Jiangfeng Wu:
A 64Gb/s PAM-4 Digital Equalizer With Tap-Configurable FFE and Partially Unrolled DFE in 28nm CMOS. 162-163 - Liangfan Chen, Lu Zhao, Zihao Chen:
A Tunable Monopole Antenna for 5G Communication Applications. 164-165 - Yi Hu, Tao Huang, Run Run, Li Yin, Guolin Li, Xiang Xie:
PPBAM: A Preprocessing-based Power-Efficient Approximate Multiplier Design for CNN. 166-167 - Yue Yu, Da Ming, Min Tan:
A 0.58-pJ/bit 56-Gb/s PAM-4 Optical Receiver Frontend with an Envelope Tracker for Co-Packaged Optics in 40-nm CMOS. 168-169 - Ziyue Chen, Yihui Shi, Ao Hu, Jiarui Xu, Guoyi Yu, Chao Wang:
A Novel Fold-Back Current Limiting Protection used in Sub-threshold LDO for Wireless Sensor Applications. 170-171 - Yivun Xie, Youze Xin, Bing Zhang, Ruipeng Yang, Yaoxin Li, Li Geng:
A Wideband and High Output Swing Analog Frontend Circuit for FMCW LiDAR. 172-173 - Zheng Lu, Shiquan Fan, Weiqing Ma, Ying Xie, Li Geng:
A 0.3 V-4 V Input Voltage Range, 0.7 V Cold Start Boost Converter with 1 V Internal Voltage Supply Generator by Using 0.18 µm CMOS Process for Energy Harvesting Application. 174-175 - Zhuang Zhang, Hanyu Shi, Danzhu Lu, Peng Cao, Zhiliang Hong:
An AOT Buck Converter with Adaptive TON Extender Achieving 2.5µs Settling Time in 4A Load Transient. 176-177 - Chi Zhang
A 1000 fps Spiking Neural Network Tracking Algorithm for On-Chip Processing of Dynamic Vision Sensor Data. 178-179 - Shichong Zhai, Wenchang Li, Jian Liu, Tianyi Zhang:
A Low Supply Sensitivity CMOS Temperature Sensor Using Dynamic-Distributing-Bias Circuit. 180-181 - Kanglin Xiao, Xiaoxin Cui, Xin Qiao, Xin'an Wang, Yuan Wang:
A Reconfigurable SRAM Computing-in-Memory Macro Supporting Ping-Pong Operation and CIM pipeline for Multi-mode MAC operations. 182-183 - Haozhe Xu, Siyuan Wei, Nan Qi, Peng Wu, Jian Liu, Nanjian Wu, Liyuan Liu, Shuangming Yu:
Floorplanning and Power/Ground Network Design for A Programmable Vision Chip. 184-185 - Wenbo Li, Qian Xie, Zheng Wang:
An Analytical Model for doping effect in charge-plasma-based TFET. 186-187 - Yifa Wang, Tong Wu, Jianping Guo:
A Charge Pump Based 1.5A NMOS LDO with 1.0~6.5V Input Range and 110mV Dropout Voltage. 188-189 - Liang Chang, Chenglong Li, Xin Zhao, Shuisheng Lin, Jun Zhou:
IPOCIM: Artificial Intelligent Processor with Adaptive Ping-pong Computing-in-Memory Architecture. 190-191 - Xin Wang, Yanqing Wu:
CVD Monolayer tungsten-based PMOS Transistor with high performance at Vds = -1 V. 192-193 - Yuqing Lu, Jun Wang:
Thermal Fatigue Analysis of Microbumps in a 3D TSV Integration Device. 196-197 - Sikai Chen
A 224-Gb/s Inverter-Based TIA with Interleaved Active-Feedback and Distributed Peaking in 28-nm CMOS for Silicon Photonic Receivers. 198-199 - Yuchen Bao, Weijian Chen, Zhixian Li, Yongsen Chen, Yanhan Zeng:
A 0.3-µW, 2.1-µVrms Neural Recording Chopper Amplifier with Low Noise DC-Servo-Loop. 200-201
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-11-15 19:19 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: