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25th HPCA 2019: Washington, DC, USA
- 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019, Washington, DC, USA, February 16-20, 2019. IEEE 2019, ISBN 978-1-7281-1444-6
Session 1: Best Paper Nominees
- Adi Fuchs, David Wentzlaff:
The Accelerator Wall: Limits of Chip Specialization. 1-14 - Artemiy Margaritov
, Siddharth Gupta
Stretch: Balancing QoS and Throughput for Colocated Server Workloads on SMT Cores. 15-27 - Mohammadamin Ajdari, Pyeongsu Park, Joonsung Kim, Dongup Kwon, Jangwoo Kim:
CIDR: A Cost-Effective In-Line Data Reduction System for Terabit-Per-Second Scale SSD Arrays. 28-41 - Ashish Venkat
Composite-ISA Cores: Enabling Multi-ISA Heterogeneity Using a Single ISA. 42-55
Session 2A: Accelerators for DNNs
- Linghao Song
HyPar: Towards Hybrid Parallelism for Deep Learning Accelerator Array. 56-68 - Zhe Li, Caiwen Ding
E-RNN: Design Optimization for Efficient Recurrent Neural Networks in FPGAs. 69-80 - Xiaowei Wang, Jiecao Yu, Charles Augustine, Ravi R. Iyer, Reetuparna Das
Bit Prudent In-Cache Acceleration of Deep Convolutional Neural Networks. 81-93 - Arash AziziMazreah, Lizhong Chen:
Shortcut Mining: Exploiting Cross-Layer Shortcut Reuse in DCNN Accelerators. 94-105
Session 2B: Power Efficiency
- Yazhou Zu, Daniel Richins, Charles Lefurgy, Vijay Janapa Reddi:
Fine-Tuning the Active Timing Margin (ATM) Control Loop for Maximizing Multi-core Efficiency on an IBM POWER Server. 106-119 - Chih-Hsun Chou, Laxmi N. Bhuyan, Daniel Wong
μDPM: Dynamic Power Management for the Microsecond Era. 120-132 - George Papadimitriou, Athanasios Chatzidimitriou, Dimitris Gizopoulos:
Adaptive Voltage/Frequency Scaling and Core Allocation for Balanced Energy and Performance on Multicore CPUs. 133-146 - Nandhini Chandramoorthy, Karthik Swaminathan, Martin Cochet, Arun Paidimarri
Resilient Low Voltage Accelerators for High Energy Efficiency. 147-158
Session 3A: Datacenter
- Neeraj Kulkarni, Feng Qi, Christina Delimitrou:
Pliant: Leveraging Approximation to Improve Datacenter Resource Efficiency. 159-171 - Haishan Zhu, David Lo, Liqun Cheng, Rama Govindaraju, Parthasarathy Ranganathan, Mattan Erez
Kelp: QoS for Accelerated Machine Learning Systems. 172-184 - Amirhossein Mirhosseini, Akshitha Sriraman, Thomas F. Wenisch:
Enhancing Server Efficiency in the Face of Killer Microseconds. 185-198 - Shuo Wang, Yun Liang, Wei Zhang:
Poly: Efficient Heterogeneous System and Application Management for Interactive Applications. 199-210
Session 3B: Emerging Technologies
- Karthik Ganesan
The What's Next Intermittent Computing Architecture. 211-223 - Xiang Fu, Leon Riesebos
eQASM: An Executable Quantum Instruction Set Architecture. 224-237 - Fernando Fernandes dos Santos
Reliability Evaluation of Mixed-Precision Architectures. 238-249 - Saptadeep Pal, Daniel Petrisko
Architecting Waferscale Processors - A GPU Case Study. 250-263
Session 4A: Security
- Peinan Li, Lutan Zhao
Conditional Speculation: An Effective Approach to Safeguard Out-of-Order Execution Against Spectre Attacks. 264-276 - Lisa Wu
FPGA Accelerated INDEL Realignment in the Cloud. 277-290 - S. Karen Khatamifard, Longfei Wang, Amitabh Das, Selçuk Köse
POWERT Channels: A Novel Class of Covert CommunicationExploiting Power Management Vulnerabilities. 291-303
Session 4B: Industry Session 1: Mobile & Low Power
- Shrikanth Ganapathy, John Kalamatianos, Bradford M. Beckmann, Steven Raasch, Lukasz G. Szafaryn:
Killi: Runtime Fault Classification to Deploy Low Voltage Caches without MBIST. 304-316 - Mark D. Hill, Vijay Janapa Reddi:
Gables: A Roofline Model for Mobile SoCs. 317-330 - Carole-Jean Wu, David Brooks, Kevin Chen, Douglas Chen, Sy Choudhury, Marat Dukhan, Kim M. Hazelwood, Eldad Isaac, Yangqing Jia, Bill Jia, Tommer Leyvand, Hao Lu, Yang Lu, Lin Qiao, Brandon Reagen, Joe Spisak, Fei Sun, Andrew Tulloch, Peter Vajda, Xiaodong Wang, Yanghan Wang, Bram Wasti, Yiming Wu, Ran Xian, Sungjoo Yoo, Peizhao Zhang:
Machine Learning at Facebook: Understanding Inference at the Edge. 331-344
Session 5A: Accelerators for Emerging Applications
- Skand Hurkat
VIP: A Versatile Inference Processor. 345-358 - Yatish Turakhia, Sneha D. Goenka
Darwin-WGA: A Co-processor Provides Increased Sensitivity in Whole Genome Alignments with High Speedup. 359-372 - Abanti Basak, Shuangchen Li, Xing Hu, Sang Min Oh, Xinfeng Xie, Li Zhao, Xiaowei Jiang, Yuan Xie:
Analysis and Optimization of the Memory Hierarchy for Graph Processing Workloads. 373-386 - Sujoy Sinha Roy, Furkan Turan
FPGA-Based High-Performance Parallel Architecture for Homomorphic Computing on Encrypted Data. 387-398
Session 5B: Memory Hierarchy Management
- Mohammad Bakhshalipour, Mehran Shakerinava, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Bingo Spatial Data Prefetcher. 399-411 - Thomas Shull, Jiho Choi, María Jesús Garzarán, Josep Torrellas:
NoMap: Speeding-Up JavaScript Using Hardware Transactional Memory. 412-425 - Jie Zhang, Myoungsoo Jung, Mahmut T. Kandemir:
FUSE: Fusing STT-MRAM into GPUs to Alleviate Off-Chip Memory Access Overheads. 426-439 - Qingsen Wang, Xu Liu, Milind Chabbi:
Featherlight Reuse-Distance Measurement. 440-453
Session 6A: Industry Session 2: Microarchitecture
- Rami Sheikh, Derek Hower:
Efficient Load Value Prediction Using Multiple Predictors and Filters. 454-465 - Ilias Vougioukas
BRB: Mitigating Branch Predictor Side-Channels. 466-477 - Arthur Perais
Elastic Instruction Fetching. 478-490
Session 6B: Best of CAL (Computer Architecture Letters)
- Paul Gratz:
The Best of IEEE Computer Architecture Letters in 2018. 491
Session 7A: GPUs/Modeling
- Saumay Dublish, Vijay Nagarajan, Nigel P. Topham:
Poise: Balancing Thread-Level Parallelism and Memory System Performance in GPUs Using Machine Learning. 492-505 - Xiebing Wang, Kai Huang, Alois C. Knoll
A Hybrid Framework for Fast and Accurate GPU Performance Estimation through Source-Level Analysis and Trace-Based Simulation. 506-518 - Akhil Arunkumar, Evgeny Bolotin, David W. Nellans, Carole-Jean Wu:
Understanding the Future of Energy Efficiency in Multi-Module GPUs. 519-532
Session 7B: Microarchitecture
- Sushant Kondguli, Michael C. Huang
R3-DLA (Reduce, Reuse, Recycle): A More Efficient Approach to Decoupled Look-Ahead Architectures. 533-544 - Gokul Subramanian Ravi
Recycling Data Slack in Out-of-Order Cores. 545-557 - Rakesh Kumar, Mehdi Alipour, David Black-Schaffer:
Freeway: Maximizing MLP for Slice-Out-of-Order Execution. 558-569
Session 8A: Memory
- Vinson Young, Sanjay Kariyappa, Moinuddin K. Qureshi:
Enabling Transparent Memory-Compression for Commodity Memory Systems. 570-581 - Jeremie S. Kim, Minesh Patel, Hasan Hassan, Lois Orosa
D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput. 582-595 - Apostolos Kokolis
PageSeer: Using Page Walks to Trigger Page Swaps in Hybrid Memory Systems. 596-608
Session 8B: Accelerators for Graphics/VR
- Chenhao Xie, Xingyao Zhang
PIM-VR: Erasing Motion Anomalies In Highly-Interactive Virtual Reality World with Customized Memory Cube. 609-622 - Martí Anglada, Enrique de Lucas
Rendering Elimination: Early Discard of Redundant Tiles in the Graphics Pipeline. 623-634 - Martí Anglada, Enrique de Lucas
Early Visibility Resolution for Removing Ineffectual Computations in the Graphics Pipeline. 635-646
Session 9A: Emerging Memory Technologies
- Matheus Ogleari, Ye Yu, Chen Qian, Ethan L. Miller, Jishen Zhao:
String Figure: A Scalable and Elastic Memory Network Architecture. 647-660 - Hyeonuk Kim
NAND-Net: Minimizing Computational Complexity of In-Memory Processing for Binary Neural Networks. 661-673 - Jiayi Huang
Active-Routing: Compute on the Way for Near-Data Processing. 674-686
Session 9B: Industry Session 3: Servers
- Manish Arora, Matt Skach, Wei Huang, Xudong An, Jason Mars, Lingjia Tang, Dean M. Tullsen
Understanding the Impact of Socket Density in Density Optimized Servers. 687-700 - Yang Li, Charles R. Lefurgy, Karthick Rajamani, Malcolm S. Allen-Ware, Guillermo J. Silva, Daniel D. Heimsoth, Saugata Ghose, Onur Mutlu:
A Scalable Priority-Aware Approach to Managing Data Center Server Power. 701-714 - Bilge Acun, Alper Buyuktosunoglu, Eun Kyung Lee, Yoonho Park:
Power Aware Heterogeneous Node Assembly. 715-727
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