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"A Cache System Design for CMPs with Built-In Coherence Verification."

Mamata Dalui, Biplab K. Sikdar (2016)

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DOI: 10.1155/2016/8093614

access: open

type: Journal Article

metadata version: 2019-10-19

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  - https://dblp.org/rec/journals/vlsi/DaluiS16
Mamata Dalui, Biplab K. Sikdar:
A Cache System Design for CMPs with Built-In Coherence Verification. VLSI Design 2016: 8093614:1-8093614:16 (2016)

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