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"Instruction-Based Self-Testing of Delay Faults in Pipelined Processors."

Virendra Singh et al. (2006)

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DOI: 10.1109/TVLSI.2006.886412

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/SinghISF06
Virendra Singh, Michiko Inoue, Kewal K. Saluja, Hideo Fujiwara:
Instruction-Based Self-Testing of Delay Faults in Pipelined Processors. IEEE Trans. Very Large Scale Integr. Syst. 14(11): 1203-1215 (2006)

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