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"A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits."

Sunmean Kim et al. (2020)

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DOI: 10.1109/TCSI.2020.2990748

access: closed

type: Journal Article

metadata version: 2020-10-01

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  - https://dblp.org/rec/journals/tcas/KimLPKK20
Sunmean Kim, Sung-Yun Lee, Sunghye Park, Kyung Rok Kim, Seokhyeong Kang:
A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 3138-3151 (2020)

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