default search action

combined dblp search
author search
venue search
publication search

ask others

"An Efficient Method for Large-Scale Gate Sizing."

Siddharth Joshi, Stephen P. Boyd (2008)

> Home

Details and statistics

DOI: 10.1109/TCSI.2008.920087

access: closed

type: Journal Article

metadata version: 2024-10-18

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcas/JoshiB08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcas/JoshiB08
Siddharth Joshi, Stephen P. Boyd:
An Efficient Method for Large-Scale Gate Sizing. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(9): 2760-2773 (2008)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.