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"BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs."

Kai-Chiang Wu et al. (2014)

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DOI: 10.1109/TCAD.2014.2334331

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - https://dblp.org/rec/journals/tcad/WuLWY14
Kai-Chiang Wu, Ing-Chao Lin, Yao-Te Wang, Shuen-Shiang Yang:
BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(10): 1591-1595 (2014)

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