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"A Platform of Resynthesizing a Clock Architecture Into Power-and-Area ..."

Tung-Liang Lin, Sao-Jie Chen (2020)

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DOI: 10.1109/TCAD.2019.2949514

access: closed

type: Journal Article

metadata version: 2020-10-06

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  - https://dblp.org/rec/journals/tcad/LinC20
Tung-Liang Lin, Sao-Jie Chen:
A Platform of Resynthesizing a Clock Architecture Into Power-and-Area Effective Clock Trees. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2475-2488 (2020)

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