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"Fast Unified Floorplan Topology Generation and Sizing on Heterogeneous FPGAs."

Pritha Banerjee, Susmita Sur-Kolay, Arijit Bishnu (2009)

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DOI: 10.1109/TCAD.2009.2015738

access: closed

type: Journal Article

metadata version: 2023-09-02

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  - https://dblp.org/rec/journals/tcad/BanerjeeSB09
Pritha Banerjee, Susmita Sur-Kolay, Arijit Bishnu:
Fast Unified Floorplan Topology Generation and Sizing on Heterogeneous FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(5): 651-661 (2009)

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