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"Built-in current testing for CMOS logic circuits using random patterns."

Hiroshi Yokoyama, Hideo Tamamoto, Yuichi Narita (1994)

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DOI: 10.1002/SCJ.4690251101

access: closed

type: Journal Article

metadata version: 2023-09-13

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Hiroshi Yokoyama, Hideo Tamamoto, Yuichi Narita:
Built-in current testing for CMOS logic circuits using random patterns. Syst. Comput. Jpn. 25(11): 1-10 (1994)

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