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"A current-sensed high-speed and low-power first-in-first-out memory using ..."

Nobutaro Shibata, Mayumi Watanabe, Yasuyuki Tanabe (2002)

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DOI: 10.1109/JSSC.2002.1004578

access: closed

type: Journal Article

metadata version: 2022-04-04

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  - https://dblp.org/rec/journals/jssc/ShibataWT02
Nobutaro Shibata, Mayumi Watanabe, Yasuyuki Tanabe:
A current-sensed high-speed and low-power first-in-first-out memory using a wordline/bitline-swapped dual-port SRAM cell. IEEE J. Solid State Circuits 37(6): 735-750 (2002)

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