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"A 45 nm SOI Embedded DRAM Macro for the POWER™ Processor 32 MByte ..."

John Barth et al. (2011)

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DOI: 10.1109/JSSC.2010.2084470

access: closed

type: Journal Article

metadata version: 2023-01-19

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  - https://dblp.org/rec/journals/jssc/BarthPNHFSMKRNC11
John Barth, Don Plass, Erik Nelson, Charlie Hwang, Gregory Fredeman, Michael A. Sperling, Abraham Mathews, Toshiaki Kirihata, William R. Reohr, Kavita Nair, Nianzheng Cao:
A 45 nm SOI Embedded DRAM Macro for the POWER™ Processor 32 MByte On-Chip L3 Cache. IEEE J. Solid State Circuits 46(1): 64-75 (2011)

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