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"Performance analysis and hardware implementation of a nearly optimal ..."

Ling Zheng et al. (2020)

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DOI: 10.1002/DAC.4365

access: closed

type: Journal Article

metadata version: 2023-06-26

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  - journals/ijcomsys/ZhengPLG20
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  - https://dblp.org/rec/journals/ijcomsys/ZhengPLG20
Ling Zheng, Weitao Pan, Yinghua Li, Ya Gao:
Performance analysis and hardware implementation of a nearly optimal buffer management scheme for high-performance shared-memory switches. Int. J. Commun. Syst. 33(8) (2020)

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