default search action
"Exploiting Packet-Level Parallelism of Packet Parsing for FPGA-Based Switches."
Junnan Li et al. (2019)
- Junnan Li, Biao Han, Zhigang Sun, Tao Li, Xiaoyan Wang:
Exploiting Packet-Level Parallelism of Packet Parsing for FPGA-Based Switches. IEICE Trans. Commun. 102-B(9): 1862-1874 (2019)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2021-09-17 09:12 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: